Date: Fri, 9 Dec 2011 18:34:45 +0000 (UTC) From: Pyun YongHyeon <yongari@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r228368 - head/sys/dev/et Message-ID: <201112091834.pB9IYjua044852@svn.freebsd.org>
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Author: yongari Date: Fri Dec 9 18:34:45 2011 New Revision: 228368 URL: http://svn.freebsd.org/changeset/base/228368 Log: Remove unnecessary definition of ET_PCIR_BAR. Controller support I/O memory only. While here, use pci_set_max_read_req(9) rather than directly manipulating PCIe device control register. Modified: head/sys/dev/et/if_et.c head/sys/dev/et/if_etreg.h Modified: head/sys/dev/et/if_et.c ============================================================================== --- head/sys/dev/et/if_et.c Fri Dec 9 18:31:22 2011 (r228367) +++ head/sys/dev/et/if_et.c Fri Dec 9 18:34:45 2011 (r228368) @@ -250,9 +250,9 @@ et_attach(device_t dev) /* * Allocate IO memory */ - sc->sc_mem_rid = ET_PCIR_BAR; + sc->sc_mem_rid = PCIR_BAR(0); sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->sc_mem_rid, RF_ACTIVE); + &sc->sc_mem_rid, RF_ACTIVE); if (sc->sc_mem_res == NULL) { device_printf(dev, "can't allocate IO memory\n"); return (ENXIO); @@ -722,12 +722,7 @@ et_bus_config(struct et_softc *sc) /* * Set max read request size to 2048 bytes */ - val = pci_read_config(sc->dev, - sc->sc_expcap + PCIR_EXPRESS_DEVICE_CTL, 2); - val &= ~PCIM_EXP_CTL_MAX_READ_REQUEST; - val |= ET_PCIV_DEVICE_CTRL_RRSZ_2K; - pci_write_config(sc->dev, - sc->sc_expcap + PCIR_EXPRESS_DEVICE_CTL, val, 2); + pci_set_max_read_req(sc->dev, 2048); return (0); } Modified: head/sys/dev/et/if_etreg.h ============================================================================== --- head/sys/dev/et/if_etreg.h Fri Dec 9 18:31:22 2011 (r228367) +++ head/sys/dev/et/if_etreg.h Fri Dec 9 18:34:45 2011 (r228368) @@ -53,8 +53,6 @@ * ET_PCIV_REPLAY_TIMER_{128,256} are from * PCI EXPRESS BASE SPECIFICATION, REV. 1.0a, Table 3-4 */ -#define ET_PCIR_BAR PCIR_BAR(0) - #define ET_PCIR_DEVICE_CAPS 0x4C #define ET_PCIM_DEVICE_CAPS_MAX_PLSZ 0x7 /* Max playload size */ #define ET_PCIV_DEVICE_CAPS_PLSZ_128 0x0
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