From owner-freebsd-arch@FreeBSD.ORG Thu Sep 30 16:15:05 2010 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5E8DF106564A for ; Thu, 30 Sep 2010 16:15:05 +0000 (UTC) (envelope-from julian@freebsd.org) Received: from out-0.mx.aerioconnect.net (out-0-24.mx.aerioconnect.net [216.240.47.84]) by mx1.freebsd.org (Postfix) with ESMTP id 41F318FC13 for ; Thu, 30 Sep 2010 16:15:05 +0000 (UTC) Received: from idiom.com (postfix@mx0.idiom.com [216.240.32.160]) by out-0.mx.aerioconnect.net (8.13.8/8.13.8) with ESMTP id o8UFqQrS006736 for ; Thu, 30 Sep 2010 08:52:26 -0700 X-Client-Authorized: MaGic Cook1e Received: from julian-mac.elischer.org (h-67-100-89-137.snfccasy.static.covad.net [67.100.89.137]) by idiom.com (Postfix) with ESMTP id D57032D6017 for ; Thu, 30 Sep 2010 08:52:25 -0700 (PDT) Message-ID: <4CA4B264.4000601@freebsd.org> Date: Thu, 30 Sep 2010 08:53:08 -0700 From: Julian Elischer User-Agent: Mozilla/5.0 (Macintosh; U; PPC Mac OS X 10.4; en-US; rv:1.9.2.9) Gecko/20100915 Thunderbird/3.1.4 MIME-Version: 1.0 To: freebsd-arch@freebsd.org References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.67 on 216.240.47.51 Subject: Re: Porting effort towards TILERA massive multicore CPUs...? X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Sep 2010 16:15:05 -0000 On 9/30/10 3:05 AM, Robert Watson wrote: > > On Sun, 26 Sep 2010, Paketix wrote: > >> there is a rather new processor from TILERA (100 core chip) which is >> most certainly already known here at FreeBSD mailing list. > > Theory has it I'll be getting access to Intel SCC 48/96-core > hardware here at Cambridge in the moderately near future, and I've > been pondering what would be involved. Their model involves 48+ x86 > cores without cache coherency, so you need separate OS instances for > each. However, the cores are linked by fifo-like memory that we'll > need to figure out what to do with. I assume Tilera has some > similar sort of message-passing feature? > > Robert > hmm echoes of 'transputer'? I believe there is an occam compiler that runs on FreeBSD.