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Date:      Wed, 20 Mar 2024 17:52:37 +0100
From:      PAVEL POPA <pavel.popa@edu.unife.it>
To:        freebsd-net@freebsd.org
Subject:   IFLIB msi-x initialization extension/patch request
Message-ID:  <CAMeLQE%2B8pohmiPmvLbMBa7Eo6ndM9Yn7Bw0B1cUpSOA_VhinPQ@mail.gmail.com>

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Hi everyone,

Don't know where I should ask this, so I'll just try with this mailing
list as a first attempt. I have implemented an IFLIB based network
device driver for a Xilinx FPGA card with a custom firmware,
everything seems to work fine except for the number of RX/TX queues
selected by IFLIB during 'iflib_msix_init()', which seems to be based
on the number of MSI-X vectors actually available on the HW, which in
my specific case that's 8. This FPGA does implement a solution that
bypasses the fact of dedicating an MSI-X vector per queue, by
providing an "interrupt aggregation ring" for which the driver
receives interrupts to read from this interrupt ring whose descriptors
tell which specific queue and queue type (if RX or TX) needs
servicing. In this way the number of RX/TX queues that can be
allocated is independent of the MSI-X vectors available on the HW. I
have implemented this successfully in the driver already, but with the
limitation of not being able to allocate more than 8 RX/TX queues due
to the way IFLIB decides that.
Finally to my question, it seems to me that a pretty simple patch on
the IFLIB side could do the trick, i.e. allowing to have this
"flexibility" in the number of RX/TX queues decided, when the related
interrupts are to be processed via such "interrupt ring"
mechanism/design. Who should I ask for this if such an extension/patch
is even possible and acceptable? Should I propose the patch myself or
it can be handled by some maintainer?

Thanks



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