From owner-freebsd-bugs@freebsd.org Sat Jan 16 23:04:37 2021 Return-Path: Delivered-To: freebsd-bugs@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id B729B4EE545 for ; Sat, 16 Jan 2021 23:04:37 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from mailman.nyi.freebsd.org (mailman.nyi.freebsd.org [IPv6:2610:1c1:1:606c::50:13]) by mx1.freebsd.org (Postfix) with ESMTP id 4DJDC94M0Tz3FbZ for ; Sat, 16 Jan 2021 23:04:37 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: by mailman.nyi.freebsd.org (Postfix) id 8D71A4EE747; Sat, 16 Jan 2021 23:04:37 +0000 (UTC) Delivered-To: bugs@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 8D0024EE5D6 for ; Sat, 16 Jan 2021 23:04:37 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4DJDC921p6z3G51 for ; Sat, 16 Jan 2021 23:04:37 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2610:1c1:1:606c::50:1d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id A24F7173B6 for ; Sat, 16 Jan 2021 23:04:36 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org ([127.0.1.5]) by kenobi.freebsd.org (8.15.2/8.15.2) with ESMTP id 10GN4aDO090616 for ; Sat, 16 Jan 2021 23:04:36 GMT (envelope-from bugzilla-noreply@freebsd.org) Received: (from www@localhost) by kenobi.freebsd.org (8.15.2/8.15.2/Submit) id 10GN4aOp090615 for bugs@FreeBSD.org; Sat, 16 Jan 2021 23:04:36 GMT (envelope-from bugzilla-noreply@freebsd.org) X-Authentication-Warning: kenobi.freebsd.org: www set sender to bugzilla-noreply@freebsd.org using -f From: bugzilla-noreply@freebsd.org To: bugs@FreeBSD.org Subject: [Bug 235016] ASIX AX99100 based uart controllers broken on 12.0 Date: Sat, 16 Jan 2021 23:04:36 +0000 X-Bugzilla-Reason: AssignedTo X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Base System X-Bugzilla-Component: kern X-Bugzilla-Version: 12.0-STABLE X-Bugzilla-Keywords: regression X-Bugzilla-Severity: Affects Many People X-Bugzilla-Who: david@dcrosstech.com X-Bugzilla-Status: New X-Bugzilla-Resolution: X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: bugs@FreeBSD.org X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: attachments.created Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 16 Jan 2021 23:04:37 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D235016 --- Comment #2 from david@dcrosstech.com --- Created attachment 221648 --> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=3D221648&action= =3Dedit Patch to fix uart_bus_pci.c This is my working patch. After consulting with the pci_alloc_msi and free= bsd MSI page as well as looking at other drivers I think this is probably the 'best' patch at this point. Given: https://people.freebsd.org/~grehan/msi_api.txt (yes, it looks a bit dated), that makes it explicitly clear that if you get back fewer MSI resou= rces than the device expects the driver is responsible for ensuring the device doesn't generate MSI greater than has been allocated.. There is no such cod= e in the UART space. Additionally there are numerous other drivers that expect a single MSI count and if they get it establish MSI for that, and if not fall back to legacy IRQ. I couldn't get anything resembling "real" documentation out of ASIX for wha= t is going on, but given a few facts: That MSI interrupts must be allocated in powers of 2, that NO MSI interrupts are visible on this device when it is enabled (that I have ben able to find), and there are 5 UART interrupt registers (tx, rx, sigchange, overrun, break) I am *guessing* they map 5 MSI interrupts to each of those individual serial interrupt registers. I brief= ly contemplated attempting to wire these directly to the uart_intr_* calls, or= all of them to uart_intr itself, but there were too many questions about the ri= ght way to pass this along, to abstract it, and the concurrency (multiple interrupts firing at once on different cores).. given that, i think this is= the best patch. Thanks! --=20 You are receiving this mail because: You are the assignee for the bug.=