From owner-svn-src-head@FreeBSD.ORG Sun Oct 19 18:41:23 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 4A0EDB9A; Sun, 19 Oct 2014 18:41:23 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 3621E94C; Sun, 19 Oct 2014 18:41:23 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s9JIfNY6094292; Sun, 19 Oct 2014 18:41:23 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s9JIfNkl094291; Sun, 19 Oct 2014 18:41:23 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201410191841.s9JIfNkl094291@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Sun, 19 Oct 2014 18:41:23 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r273283 - head/sys/arm/freescale/imx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 19 Oct 2014 18:41:23 -0000 Author: ian Date: Sun Oct 19 18:41:22 2014 New Revision: 273283 URL: https://svnweb.freebsd.org/changeset/base/273283 Log: Attach this driver during BUS_PASS_BUS and move the cpu init code to a bus_new_pass() handler so it doesn't happen until BUS_PASS_CPU. This allows the anatop driver to outbid the generic simplebus driver (which the FDT data describes as compatible). Some day when we handle power regulators, this driver may actually become a functional simplebus and attach the regulators as children, as described in the FDT data. Modified: head/sys/arm/freescale/imx/imx6_anatop.c Modified: head/sys/arm/freescale/imx/imx6_anatop.c ============================================================================== --- head/sys/arm/freescale/imx/imx6_anatop.c Sun Oct 19 18:31:11 2014 (r273282) +++ head/sys/arm/freescale/imx/imx6_anatop.c Sun Oct 19 18:41:22 2014 (r273283) @@ -98,6 +98,7 @@ struct imx6_anatop_softc { uint32_t cpu_maxmv; uint32_t cpu_maxmhz_hw; boolean_t cpu_overclock_enable; + boolean_t cpu_init_done; uint32_t refosc_mhz; void *temp_intrhand; uint32_t temp_high_val; @@ -623,6 +624,31 @@ intr_setup(void *arg) config_intrhook_disestablish(&sc->intr_setup_hook); } +static void +imx6_anatop_new_pass(device_t dev) +{ + struct imx6_anatop_softc *sc; + const int cpu_init_pass = BUS_PASS_CPU + BUS_PASS_ORDER_MIDDLE; + + /* + * We attach during BUS_PASS_BUS (because some day we will be a + * simplebus that has regulator devices as children), but some of our + * init work cannot be done until BUS_PASS_CPU (we rely on other devices + * that attach on the CPU pass). + */ + sc = device_get_softc(dev); + if (!sc->cpu_init_done && bus_current_pass >= cpu_init_pass) { + sc->cpu_init_done = true; + cpufreq_initialize(sc); + initialize_tempmon(sc); + if (bootverbose) { + device_printf(sc->dev, "CPU %uMHz @ %umV\n", + sc->cpu_curmhz, sc->cpu_curmv); + } + } + bus_generic_new_pass(dev); +} + static int imx6_anatop_detach(device_t dev) { @@ -666,13 +692,13 @@ imx6_anatop_attach(device_t dev) imx6_anatop_write_4(IMX6_ANALOG_PMU_MISC0_SET, IMX6_ANALOG_PMU_MISC0_SELFBIASOFF); - cpufreq_initialize(sc); - initialize_tempmon(sc); + /* + * Some day, when we're ready to deal with the actual anatop regulators + * that are described in fdt data as children of this "bus", this would + * be the place to invoke a simplebus helper routine to instantiate the + * children from the fdt data. + */ - if (bootverbose) { - device_printf(sc->dev, "CPU %uMHz @ %umV\n", sc->cpu_curmhz, - sc->cpu_curmv); - } err = 0; out: @@ -715,6 +741,9 @@ static device_method_t imx6_anatop_metho DEVMETHOD(device_attach, imx6_anatop_attach), DEVMETHOD(device_detach, imx6_anatop_detach), + /* Bus interface */ + DEVMETHOD(bus_new_pass, imx6_anatop_new_pass), + DEVMETHOD_END }; @@ -727,5 +756,7 @@ static driver_t imx6_anatop_driver = { static devclass_t imx6_anatop_devclass; EARLY_DRIVER_MODULE(imx6_anatop, simplebus, imx6_anatop_driver, - imx6_anatop_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_FIRST + 1); + imx6_anatop_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); +EARLY_DRIVER_MODULE(imx6_anatop, ofwbus, imx6_anatop_driver, + imx6_anatop_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);