From owner-svn-src-all@FreeBSD.ORG Fri Dec 28 08:20:47 2012 Return-Path: Delivered-To: svn-src-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id C0F4428B; Fri, 28 Dec 2012 08:20:47 +0000 (UTC) (envelope-from glebius@FreeBSD.org) Received: from cell.glebius.int.ru (glebius.int.ru [81.19.69.10]) by mx1.freebsd.org (Postfix) with ESMTP id 3649B8FC08; Fri, 28 Dec 2012 08:20:46 +0000 (UTC) Received: from cell.glebius.int.ru (localhost [127.0.0.1]) by cell.glebius.int.ru (8.14.5/8.14.5) with ESMTP id qBS8KcGV017634; Fri, 28 Dec 2012 12:20:38 +0400 (MSK) (envelope-from glebius@FreeBSD.org) Received: (from glebius@localhost) by cell.glebius.int.ru (8.14.5/8.14.5/Submit) id qBS8KcIP017633; Fri, 28 Dec 2012 12:20:38 +0400 (MSK) (envelope-from glebius@FreeBSD.org) X-Authentication-Warning: cell.glebius.int.ru: glebius set sender to glebius@FreeBSD.org using -f Date: Fri, 28 Dec 2012 12:20:38 +0400 From: Gleb Smirnoff To: Attilio Rao Subject: Re: svn commit: r244732 - head/sys/sys Message-ID: <20121228082038.GZ80310@FreeBSD.org> References: <201212271236.qBRCawuU078203@svn.freebsd.org> <20121227124657.GX80310@FreeBSD.org> <20121227132507.GY80310@FreeBSD.org> MIME-Version: 1.0 Content-Type: text/plain; charset=koi8-r Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: svn-src-head@FreeBSD.org, svn-src-all@FreeBSD.org, src-committers@FreeBSD.org X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Dec 2012 08:20:47 -0000 On Thu, Dec 27, 2012 at 08:37:24AM -0800, Attilio Rao wrote: A> > Speaking of which, as you are here, I just found out that r241037 A> > breaks the alignment of the structure. A> > Infact the padding member is not updated accordingly. A> > A> > We don't have a param to control L2 caches, but I think that we can A> > safely align them to the L1 cacheline for sure. A> > Also, note that this padding is completely broken for MI requirements A> > (it just assumes blindly 128 bytes L2 cachelines, which not always A> > true even on i386). A> A> More specifically this patch: A> http://www.freebsd.org/~attilio/bufring_pad.patch A> A> Of course I don't think the optimization is important in the A> DEBUG_BUFRING on case, so the patch should be fine. Agreed, thanks. And thanks for removing the br_prod_bufs. Sorry for breaking alignment in r241037. And last time we talked about alignment, it was noticed that our current CACHE_LINE_SIZE on amd64 is 128, while real size is 64. This 128 was some optimisation proposed by Intel for some past generation of CPUs and is no longer actual. Shouldn't we change it back to 64? -- Totus tuus, Glebius.