From owner-cvs-all@FreeBSD.ORG Tue Apr 24 21:17:46 2007 Return-Path: X-Original-To: cvs-all@FreeBSD.org Delivered-To: cvs-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 195C916A400; Tue, 24 Apr 2007 21:17:46 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [69.147.83.41]) by mx1.freebsd.org (Postfix) with ESMTP id 09D3113C4BD; Tue, 24 Apr 2007 21:17:46 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.8/8.13.8) with ESMTP id l3OLHj4R017579; Tue, 24 Apr 2007 21:17:45 GMT (envelope-from jhb@repoman.freebsd.org) Received: (from jhb@localhost) by repoman.freebsd.org (8.13.8/8.13.8/Submit) id l3OLHjRn017578; Tue, 24 Apr 2007 21:17:45 GMT (envelope-from jhb) Message-Id: <200704242117.l3OLHjRn017578@repoman.freebsd.org> From: John Baldwin Date: Tue, 24 Apr 2007 21:17:45 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/amd64/amd64 vm_machdep.c src/sys/i386/i386 vm_machdep.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Apr 2007 21:17:46 -0000 jhb 2007-04-24 21:17:45 UTC FreeBSD src repository Modified files: sys/amd64/amd64 vm_machdep.c sys/i386/i386 vm_machdep.c Log: Fix the triple fault used as a last resort during a reboot to actually fault. The previous method zero'd out the page tables, invalidated the TLB, and then entered a spin loop. The idea was that the instruction after the TLB invalidate would result in a page fault and the page fault and subsequent double fault wouldn't be able to determine the physical page for their fault handlers' first instruction. This stopped working when PGE (PG_G PTE/PDE bit) support was added as a TLB invalidate via %cr3 reload doesn't clear TLB entries with PG_G set. Thus, the CPU was still able to map the virtual address for the spin loop and happily performed its infinite loop. The triple fault now uses a much more deterministic sledge-hammer approach to generate a triple fault. First, the IDT descriptor is set to point to an empty IDT, so any interrupts (including a double fault) will instantly fault. Second, we trigger a int 3 breakpoint to force an interrupt and kick off a triple fault. MFC after: 3 days Revision Changes Path 1.254 +8 -3 src/sys/amd64/amd64/vm_machdep.c 1.279 +7 -3 src/sys/i386/i386/vm_machdep.c