Date: Thu, 8 May 2003 23:57:10 -0700 (PDT) From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 30840 for review Message-ID: <200305090657.h496vA9u025632@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=30840 Change 30840 by marcel@marcel_nfs on 2003/05/08 23:56:50 Only set the ia32 flags (eflags and cflg) when executing an ia32 application. Also, enable the high FP registers by default. The ia32 engine needs them. Affected files ... .. //depot/projects/ia64_epc/sys/ia64/ia32/ia32_sysvec.c#4 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#23 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/mp_machdep.c#10 edit Differences ... ==== //depot/projects/ia64_epc/sys/ia64/ia32/ia32_sysvec.c#4 (text+ko) ==== @@ -248,8 +248,12 @@ exec_setregs(td, entry, stack, ps_strings); - /* Mark this process as using the ia32 instruction set. */ + /* + * Mark this process as using the ia32 instruction set and + * enable the high FP registers by default. + */ frame->tf_special.psr |= IA64_PSR_IS; + frame->tf_special.psr &= ~IA64_PSR_DFH; codesel = LSEL(LUCODE_SEL, SEL_UPL); datasel = LSEL(LUDATA_SEL, SEL_UPL); @@ -333,9 +337,9 @@ frame->tf_scratch.gr30 = ldtseg; /* LDTD */ frame->tf_scratch.gr31 = gdtseg; /* GDTD */ -#if 0 + /* Set ia32 control registers on this processor. */ + ia64_set_cflg(CR0_PE | CR0_PG | ((long)(CR4_XMM | CR4_FXSR) << 32)); ia64_set_eflag(PSL_USER); -#endif /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ frame->tf_scratch.gr11 = IA32_PS_STRINGS; ==== //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#23 (text+ko) ==== @@ -729,12 +729,6 @@ PCPU_SET(curthread, &thread0); /* - * Set ia32 control registers. - */ - ia64_set_cflg((CR0_PE | CR0_PG) - | ((long)(CR4_XMM | CR4_FXSR) << 32)); - - /* * Initialize the rest of proc 0's PCB. * * Set the kernel sp, reserving space for an (empty) trapframe, ==== //depot/projects/ia64_epc/sys/ia64/ia64/mp_machdep.c#10 (text+ko) ==== @@ -97,9 +97,6 @@ ia64_set_fpsr(IA64_FPSR_DEFAULT); - /* Set ia32 control registers. */ - ia64_set_cflg(CR0_PE | CR0_PG | ((long)(CR4_XMM|CR4_FXSR) << 32)); - /* Wait until it's time for us to be unleashed */ while (ap_spin) /* spin */;
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