From owner-freebsd-arch@FreeBSD.ORG Fri Oct 16 18:36:24 2009 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0836B106566B; Fri, 16 Oct 2009 18:36:24 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from cyrus.watson.org (cyrus.watson.org [65.122.17.42]) by mx1.freebsd.org (Postfix) with ESMTP id B755A8FC12; Fri, 16 Oct 2009 18:36:23 +0000 (UTC) Received: from bigwig.baldwin.cx (66.111.2.69.static.nyinternet.net [66.111.2.69]) by cyrus.watson.org (Postfix) with ESMTPSA id 4D0F646B2D; Fri, 16 Oct 2009 14:36:23 -0400 (EDT) Received: from jhbbsd.hudson-trading.com (unknown [209.249.190.8]) by bigwig.baldwin.cx (Postfix) with ESMTPA id 90C058A01D; Fri, 16 Oct 2009 14:36:22 -0400 (EDT) From: John Baldwin To: freebsd-arch@freebsd.org Date: Fri, 16 Oct 2009 14:19:07 -0400 User-Agent: KMail/1.9.7 References: <20091015.085910.-520412456.imp@bsdimp.com> <200910161346.03066.jkim@FreeBSD.org> <200910161400.00564.jkim@FreeBSD.org> In-Reply-To: <200910161400.00564.jkim@FreeBSD.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200910161419.08369.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0.1 (bigwig.baldwin.cx); Fri, 16 Oct 2009 14:36:22 -0400 (EDT) X-Virus-Scanned: clamav-milter 0.95.1 at bigwig.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-2.5 required=4.2 tests=AWL,BAYES_00,RDNS_NONE autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on bigwig.baldwin.cx Cc: Marcel Moolenaar , Jung-uk Kim Subject: Re: x86BIOS and the ISA bus and low memory in general... X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Oct 2009 18:36:24 -0000 On Friday 16 October 2009 1:59:58 pm Jung-uk Kim wrote: > On Friday 16 October 2009 01:46 pm, Jung-uk Kim wrote: > > On Thursday 15 October 2009 04:37 pm, Marcel Moolenaar wrote: > > > On Oct 15, 2009, at 12:45 PM, M. Warner Losh wrote: > > > > [[ redirected to arch@ ]] > > > > > > > > In message: <200910151431.53236.jkim@FreeBSD.org> > > > > Jung-uk Kim writes: > > > > > > > > > > > > : This is actually very interesting discussion for me because > > > > : one of > > > > > > > > my > > > > > > > > : pet projects is extending x86bios to support non-PC > > > > : architectures. If anyone is interested, the current source > > > > : tarball is here: > > > > : > > > > : http://people.freebsd.org/~jkim/x86bios-20091015.tar.bz2 > > > > : > > > > : Especially, please see the code around #ifdef > > > > : X86BIOS_COMPAT_ARCH. Basically, mapping I/O ports and orm(4) > > > > : is missing. We don't have > > > > > > > > to > > > > > > > > : implement I/O ports but orm(4) vs. bus_space(9) is critical > > > > : to make it a reality. Please consider it as a real practical > > > > : example for orm, not just a blackhole driver. :-) > > > > > > > > I thought that most video cards had I/O ports as well as video > > > > RAM that needed to be mapped... Am I crazy? > > > > > > It depends on the platform. On an Itanium machine I have the > > > VGA frame buffer is at physical address 0xA0000-0xC0000. > > > > The address is the same, then. :-) > > > > > The only requirement is that you use non-cached I/O, otherwise > > > you get a machine check. This can mean a non-identity mapping > > > or not. It all depends... > > > > I couldn't find a way to manipulate memory attribute directly on > > ia64, i.e., mem_range_attr_{get,set}() and pmap_mapdev_attr() only > > exist on amd64 and i386. Does pmap_mapdev() set the attribute as > > UC? > > It seems pmap_mapdev() on ia64 uses IA64_PHYS_TO_RR6() macro. If I > read the source correctly, then it is gives UC mapped "view" of the > physical address, right? If so, orm(4) can simply do > pmap_mapdev()/pmap_unmapdev() around bus_space_read_region_1(). Am I > right? I think you need to back up a bit. Instead of having a bunch of MD code to provide ISA access for each arch, instead do what Warner suggests which is to create a psuedo ISA device that attaches to isa0 and acts as a proxy for ISA I/O. It can allocate ISA resources for both memory and I/O access and then use bus_space_*() accesses to perform actual I/O. This will be MI. The only problem I can see with this approach is if a BIOS call attempts to frob a resource that another ISA device already owns. There may be ways around that though. -- John Baldwin