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From: Nathan Whitehorn <nwhitehorn@FreeBSD.org>
Date: Tue, 6 Jul 2010 15:31:58 +0000 (UTC)
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Subject: cvs commit: src/sys/powerpc/powerpc openpic.c
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nwhitehorn    2010-07-06 15:31:58 UTC

  FreeBSD src repository

  Modified files:
    sys/powerpc/powerpc  openpic.c 
  Log:
  SVN rev 209725 on 2010-07-06 15:31:58Z by nwhitehorn
  
  Fix interrupt distribution to multiple CPUs on systems with cascaded PICs.
  Because slave PICs send all interrupts to their CPU 0 output line (which
  is routed to a pin on the master PIC), changes to per-CPU register banks
  like EOI on the slave PIC must be accessed for CPU 0, instead of the
  CPU actually processing the interrupt.
  
  Submitted by:   Andreas Tobler
  
  Revision  Changes    Path
  1.30      +14 -7     src/sys/powerpc/powerpc/openpic.c