From owner-svn-src-head@FreeBSD.ORG Thu Jan 29 20:41:43 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9951DE54; Thu, 29 Jan 2015 20:41:43 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8581E6A5; Thu, 29 Jan 2015 20:41:43 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t0TKfhqO029430; Thu, 29 Jan 2015 20:41:43 GMT (envelope-from jhb@FreeBSD.org) Received: (from jhb@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t0TKfhAJ029429; Thu, 29 Jan 2015 20:41:43 GMT (envelope-from jhb@FreeBSD.org) Message-Id: <201501292041.t0TKfhAJ029429@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: jhb set sender to jhb@FreeBSD.org using -f From: John Baldwin Date: Thu, 29 Jan 2015 20:41:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r277900 - head/sys/x86/x86 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Jan 2015 20:41:43 -0000 Author: jhb Date: Thu Jan 29 20:41:42 2015 New Revision: 277900 URL: https://svnweb.freebsd.org/changeset/base/277900 Log: Opt for performance over power-saving on Intel CPUs that have a P-state but not C-state invariant TSC by changing the default behavior to leaving the TSC enabled as the timecounter and disabling C2+ instead of disabling the TSC by default. Discussed with: jkim Tested by: Jan Kokemuller Modified: head/sys/x86/x86/tsc.c Modified: head/sys/x86/x86/tsc.c ============================================================================== --- head/sys/x86/x86/tsc.c Thu Jan 29 20:40:25 2015 (r277899) +++ head/sys/x86/x86/tsc.c Thu Jan 29 20:41:42 2015 (r277900) @@ -522,17 +522,22 @@ init_TSC_tc(void) } /* - * We cannot use the TSC if it stops incrementing while idle. * Intel CPUs without a C-state invariant TSC can stop the TSC - * in either C2 or C3. + * in either C2 or C3. Disable use of C2 and C3 while using + * the TSC as the timecounter. The timecounter can be changed + * to enable C2 and C3. + * + * Note that the TSC is used as the cputicker for computing + * thread runtime regardless of the timecounter setting, so + * using an alternate timecounter and enabling C2 or C3 can + * result incorrect runtimes for kernel idle threads (but not + * for any non-idle threads). */ if (cpu_deepest_sleep >= 2 && cpu_vendor_id == CPU_VENDOR_INTEL && (amd_pminfo & AMDPM_TSC_INVARIANT) == 0) { - tsc_timecounter.tc_quality = -1000; tsc_timecounter.tc_flags |= TC_FLAGS_C2STOP; if (bootverbose) - printf("TSC timecounter disabled: C2/C3 may halt it.\n"); - goto init; + printf("TSC timecounter disables C2 and C3.\n"); } /*