Date: Wed, 16 Jul 1997 15:46:29 -0600 From: Steve Passe <smp@csn.net> To: Terry Lambert <terry@lambert.org> Cc: smp@FreeBSD.ORG, current@FreeBSD.ORG Subject: Re: self modifying kernel code Message-ID: <199707162146.PAA10070@Ilsa.StevesCafe.com> In-Reply-To: Your message of "Wed, 16 Jul 1997 14:41:26 PDT." <199707162141.OAA01599@phaeton.artisoft.com>
next in thread | previous in thread | raw e-mail | index | archive | help
Hi, > > I see the possible usefullness for "self-modifying-code" in several places in > > the SMP kernel. > > [ ... discussion of patch vectors vs. indirected jump tables ... ] > > Comments? > > Are we assuming that the processors will be Pentium only? The icache > is not written back prior to the P5. This takes a significant number > of NOP's to flush the pipeline (as discussed in Van Guilluwe's "The > Undocumented PC" in the section where he investigates instruction cache > depth using self-modifying code). > > Note that these patches would have to be done for 386/486 in the UP case. interesting point. we decided along time ago that supporting 486/SMP was not going to happen. There is very little if any such legacy hardware left, and I doubt you could by such a thing anymore. so it could be #ifdef'd in such a way as to NOT happen on SMP + 486 easily enough. -- Steve Passe | powered by smp@csn.net | Symmetric MultiProcessor FreeBSD
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199707162146.PAA10070>