From owner-svn-src-head@FreeBSD.ORG Fri May 15 05:37:37 2009 Return-Path: Delivered-To: svn-src-head@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3FE5C106566C; Fri, 15 May 2009 05:37:37 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (bsdimp.com [199.45.160.85]) by mx1.freebsd.org (Postfix) with ESMTP id F40618FC26; Fri, 15 May 2009 05:37:36 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from localhost (localhost [127.0.0.1]) by harmony.bsdimp.com (8.14.3/8.14.1) with ESMTP id n4F5ZSBh057956; Thu, 14 May 2009 23:35:28 -0600 (MDT) (envelope-from imp@bsdimp.com) Date: Thu, 14 May 2009 23:35:36 -0600 (MDT) Message-Id: <20090514.233536.1299798630.imp@bsdimp.com> To: stas@FreeBSD.org From: "M. Warner Losh" In-Reply-To: <20090515092205.6f6d06fa.stas@FreeBSD.org> References: <200905122114.n4CLEag9033208@svn.freebsd.org> <20090514.213712.-404854369.imp@bsdimp.com> <20090515092205.6f6d06fa.stas@FreeBSD.org> X-Mailer: Mew version 5.2 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: svn-src-head@FreeBSD.org, svn-src-all@FreeBSD.org, src-committers@FreeBSD.org Subject: Re: svn commit: r192027 - head/sys/arm/at91 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 May 2009 05:37:37 -0000 In message: <20090515092205.6f6d06fa.stas@FreeBSD.org> Stanislav Sedov writes: : On Thu, 14 May 2009 21:37:12 -0600 (MDT) : "M. Warner Losh" mentioned: : : > In message: <200905122114.n4CLEag9033208@svn.freebsd.org> : > Stanislav Sedov writes: : > : @@ -926,6 +937,7 @@ atestart_locked(struct ifnet *ifp) : > : * tell the hardware to xmit the packet. : > : */ : > : WR4(sc, ETH_TAR, segs[0].ds_addr); : > : + BARRIER(sc, ETH_TAR, 8, BUS_SPACE_BARRIER_WRITE); : > : WR4(sc, ETH_TCR, segs[0].ds_len); : > : > Why is a barrier needed here? : > : Writing the TCR register triggers the transmit, so it had to be written : strongly after the TAR register. That's why I added the barrier here. Then shouldn't the barrier be after TCR write? Or does this ensure that the write is before TCR? Warner