From owner-svn-src-head@FreeBSD.ORG Thu Jan 29 21:04:22 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A8AFF510; Thu, 29 Jan 2015 21:04:22 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 81CC39C6; Thu, 29 Jan 2015 21:04:22 +0000 (UTC) Received: from ralph.baldwin.cx (pool-173-70-85-31.nwrknj.fios.verizon.net [173.70.85.31]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id F3568B95B; Thu, 29 Jan 2015 16:04:20 -0500 (EST) From: John Baldwin To: src-committers@freebsd.org Subject: Re: svn commit: r277900 - head/sys/x86/x86 Date: Thu, 29 Jan 2015 15:45:12 -0500 Message-ID: <8728880.CZu0UL854D@ralph.baldwin.cx> User-Agent: KMail/4.14.2 (FreeBSD/10.1-STABLE; KDE/4.14.2; amd64; ; ) In-Reply-To: <201501292041.t0TKfhAJ029429@svn.freebsd.org> References: <201501292041.t0TKfhAJ029429@svn.freebsd.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Thu, 29 Jan 2015 16:04:21 -0500 (EST) Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Jan 2015 21:04:22 -0000 On Thursday, January 29, 2015 08:41:43 PM John Baldwin wrote: > Author: jhb > Date: Thu Jan 29 20:41:42 2015 > New Revision: 277900 > URL: https://svnweb.freebsd.org/changeset/base/277900 > > Log: > Opt for performance over power-saving on Intel CPUs that have a > P-state but not C-state invariant TSC by changing the default behavior > to leaving the TSC enabled as the timecounter and disabling C2+ instead > of disabling the TSC by default. > > Discussed with: jkim > Tested by: Jan Kokemuller Note that C1E remains enabled and in my experience that often gives the largest gain in power saving (that is, the delta between C1E and C2 is much smaller than the gain of plain C1 to C1E). Also, note that we always use the TSC as the cpu ticker, even if it is not the timecounter. Thus, if C2+ is enabled on the systems, the kernel idle threads will have an artificially low runtime since their idle time is not properly accounted for. This does not affect any other threads as only the idle threads "run" while the CPU is in C2+ with the TSC effectively paused. The new default means that the idle threads will now have the proper runtime, however. -- John Baldwin