From owner-svn-src-all@FreeBSD.ORG Wed Feb 27 00:25:45 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 6881B6C3; Wed, 27 Feb 2013 00:25:45 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 4FF13CC9; Wed, 27 Feb 2013 00:25:45 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.5/8.14.5) with ESMTP id r1R0Pj7h024942; Wed, 27 Feb 2013 00:25:45 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.5/8.14.5/Submit) id r1R0Pi0E024938; Wed, 27 Feb 2013 00:25:44 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201302270025.r1R0Pi0E024938@svn.freebsd.org> From: Adrian Chadd Date: Wed, 27 Feb 2013 00:25:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r247366 - in head/sys/dev/ath: . ath_hal X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Feb 2013 00:25:45 -0000 Author: adrian Date: Wed Feb 27 00:25:44 2013 New Revision: 247366 URL: http://svnweb.freebsd.org/changeset/base/247366 Log: Add in the STBC TX/RX capability support into the HAL and driver. The HAL already included the STBC fields; it just needed to be exposed to the driver and net80211 stack. This should allow single-stream STBC TX and RX to be negotiated; however the driver and rate control code currently don't do anything with it. Modified: head/sys/dev/ath/ath_hal/ah.c head/sys/dev/ath/ath_hal/ah.h head/sys/dev/ath/if_ath.c head/sys/dev/ath/if_athvar.h Modified: head/sys/dev/ath/ath_hal/ah.c ============================================================================== --- head/sys/dev/ath/ath_hal/ah.c Wed Feb 27 00:14:12 2013 (r247365) +++ head/sys/dev/ath/ath_hal/ah.c Wed Feb 27 00:25:44 2013 (r247366) @@ -692,6 +692,10 @@ ath_hal_getcapability(struct ath_hal *ah return pCap->hal4AddrAggrSupport ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_EXT_CHAN_DFS: return pCap->halExtChanDfsSupport ? HAL_OK : HAL_ENOTSUPP; + case HAL_CAP_RX_STBC: + return pCap->halRxStbcSupport ? HAL_OK : HAL_ENOTSUPP; + case HAL_CAP_TX_STBC: + return pCap->halTxStbcSupport ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_COMBINED_RADAR_RSSI: return pCap->halUseCombinedRadarRssi ? HAL_OK : HAL_ENOTSUPP; case HAL_CAP_AUTO_SLEEP: Modified: head/sys/dev/ath/ath_hal/ah.h ============================================================================== --- head/sys/dev/ath/ath_hal/ah.h Wed Feb 27 00:14:12 2013 (r247365) +++ head/sys/dev/ath/ath_hal/ah.h Wed Feb 27 00:25:44 2013 (r247366) @@ -137,6 +137,9 @@ typedef enum { HAL_CAP_RIFS_RX_ENABLED = 53, HAL_CAP_BB_DFS_HANG = 54, + HAL_CAP_RX_STBC = 58, + HAL_CAP_TX_STBC = 59, + HAL_CAP_BT_COEX = 60, /* hardware is capable of bluetooth coexistence */ HAL_CAP_DYNAMIC_SMPS = 61, /* Dynamic MIMO Power Save hardware support */ Modified: head/sys/dev/ath/if_ath.c ============================================================================== --- head/sys/dev/ath/if_ath.c Wed Feb 27 00:14:12 2013 (r247365) +++ head/sys/dev/ath/if_ath.c Wed Feb 27 00:25:44 2013 (r247366) @@ -781,6 +781,28 @@ ath_attach(u_int16_t devid, struct ath_s ic->ic_txstream = txs; ic->ic_rxstream = rxs; + /* + * Setup TX and RX STBC based on what the HAL allows and + * the currently configured chainmask set. + * Ie - don't enable STBC TX if only one chain is enabled. + * STBC RX is fine on a single RX chain; it just won't + * provide any real benefit. + */ + if (ath_hal_getcapability(ah, HAL_CAP_RX_STBC, 0, + NULL) == HAL_OK) { + sc->sc_rx_stbc = 1; + device_printf(sc->sc_dev, + "[HT] 1 stream STBC receive enabled\n"); + ic->ic_htcaps |= IEEE80211_HTCAP_RXSTBC_1STREAM; + } + if (txs > 1 && ath_hal_getcapability(ah, HAL_CAP_TX_STBC, 0, + NULL) == HAL_OK) { + sc->sc_tx_stbc = 1; + device_printf(sc->sc_dev, + "[HT] 1 stream STBC transmit enabled\n"); + ic->ic_htcaps |= IEEE80211_HTCAP_TXSTBC; + } + (void) ath_hal_getcapability(ah, HAL_CAP_RTS_AGGR_LIMIT, 1, &sc->sc_rts_aggr_limit); if (sc->sc_rts_aggr_limit != (64 * 1024)) Modified: head/sys/dev/ath/if_athvar.h ============================================================================== --- head/sys/dev/ath/if_athvar.h Wed Feb 27 00:14:12 2013 (r247365) +++ head/sys/dev/ath/if_athvar.h Wed Feb 27 00:25:44 2013 (r247366) @@ -567,7 +567,9 @@ struct ath_softc { /* * Second set of flags. */ - u_int32_t sc_use_ent : 1; + u_int32_t sc_use_ent : 1, + sc_rx_stbc : 1, + sc_tx_stbc : 1; /* * Enterprise mode configuration for AR9380 and later chipsets.