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Date:      Thu, 14 Dec 2017 06:45:04 +0000 (UTC)
From:      "Landon J. Fuller" <landonf@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r326841 - head/sys/dev/bwn
Message-ID:  <201712140645.vBE6j4rk015796@repo.freebsd.org>

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Author: landonf
Date: Thu Dec 14 06:45:04 2017
New Revision: 326841
URL: https://svnweb.freebsd.org/changeset/base/326841

Log:
  Add basic bwn(4) support for the (BCMA-based) BCM43224 and BCM43225.
  
  - Add the BCM4322X D11 core revision and missing BCM43224 PCI device ID to
    our device tables.
  - Disable the DMA engine parity check (rather than adding parity support
    to the to-be-replaced bwn(4) DMA implementation).
  
  Currently, N-PHY support in bwn(4) is GPL licensed, and is not included by
  default. Until this is replaced with Broadcom's ISC-licensed N-PHY
  implementation, bwn(4) must be rebuilt to enable N-PHY support.
  
  To build bwn(4) with N-PHY support, add the following lines to your kernel
  configuration file and rebuild the kernel (and modules):
  
  	options BWN_GPL_PHY
  
  To test bwn(4) with a BCM43224/BCM43225 device, install the firmware from
  the net/bwn-firmware-kmod port, and place the following lines in
  loader.conf(5):
  
  	hw.bwn_pci.preferred="1"
  
  	if_bwn_pci_load="YES
  	bwn_v4_ucode_load="YES"
  	bwn_v4_n_ucode_load="YES"
  	bwn_v4_lp_ucode_load="YES"
  
  Approved by:	adrian (mentor, implicit)
  Sponsored by:	The FreeBSD Foundation

Modified:
  head/sys/dev/bwn/if_bwn.c
  head/sys/dev/bwn/if_bwn_bhnd.c
  head/sys/dev/bwn/if_bwn_pci.c
  head/sys/dev/bwn/if_bwnreg.h

Modified: head/sys/dev/bwn/if_bwn.c
==============================================================================
--- head/sys/dev/bwn/if_bwn.c	Thu Dec 14 04:41:07 2017	(r326840)
+++ head/sys/dev/bwn/if_bwn.c	Thu Dec 14 06:45:04 2017	(r326841)
@@ -1421,7 +1421,7 @@ bwn_phy_getinfo(struct bwn_mac *mac, int gmode)
 	    (phy->type == BWN_PHYTYPE_B && phy->rev != 2 &&
 		phy->rev != 4 && phy->rev != 6 && phy->rev != 7) ||
 	    (phy->type == BWN_PHYTYPE_G && phy->rev > 9) ||
-	    (phy->type == BWN_PHYTYPE_N && phy->rev > 4) ||
+	    (phy->type == BWN_PHYTYPE_N && phy->rev > 6) ||
 	    (phy->type == BWN_PHYTYPE_LP && phy->rev > 2))
 		goto unsupphy;
 
@@ -3110,6 +3110,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 			addrext = ((ring64 >> 32) & SIBA_DMA_TRANSLATION_MASK)
 			    >> 30;
 			value = BWN_DMA64_TXENABLE;
+			value |= BWN_DMA64_TXPARITY_DISABLE;
 			value |= (addrext << BWN_DMA64_TXADDREXT_SHIFT)
 			    & BWN_DMA64_TXADDREXT_MASK;
 			BWN_DMA_WRITE(dr, BWN_DMA64_TXCTL, value);
@@ -3122,6 +3123,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 			ring32 = (uint32_t)(dr->dr_ring_dmabase);
 			addrext = (ring32 & SIBA_DMA_TRANSLATION_MASK) >> 30;
 			value = BWN_DMA32_TXENABLE;
+			value |= BWN_DMA32_TXPARITY_DISABLE;
 			value |= (addrext << BWN_DMA32_TXADDREXT_SHIFT)
 			    & BWN_DMA32_TXADDREXT_MASK;
 			BWN_DMA_WRITE(dr, BWN_DMA32_TXCTL, value);
@@ -3141,6 +3143,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 		addrext = ((ring64 >> 32) & SIBA_DMA_TRANSLATION_MASK) >> 30;
 		value = (dr->dr_frameoffset << BWN_DMA64_RXFROFF_SHIFT);
 		value |= BWN_DMA64_RXENABLE;
+		value |= BWN_DMA64_RXPARITY_DISABLE;
 		value |= (addrext << BWN_DMA64_RXADDREXT_SHIFT)
 		    & BWN_DMA64_RXADDREXT_MASK;
 		BWN_DMA_WRITE(dr, BWN_DMA64_RXCTL, value);
@@ -3155,6 +3158,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 		addrext = (ring32 & SIBA_DMA_TRANSLATION_MASK) >> 30;
 		value = (dr->dr_frameoffset << BWN_DMA32_RXFROFF_SHIFT);
 		value |= BWN_DMA32_RXENABLE;
+		value |= BWN_DMA32_RXPARITY_DISABLE;
 		value |= (addrext << BWN_DMA32_RXADDREXT_SHIFT)
 		    & BWN_DMA32_RXADDREXT_MASK;
 		BWN_DMA_WRITE(dr, BWN_DMA32_RXCTL, value);

Modified: head/sys/dev/bwn/if_bwn_bhnd.c
==============================================================================
--- head/sys/dev/bwn/if_bwn_bhnd.c	Thu Dec 14 04:41:07 2017	(r326840)
+++ head/sys/dev/bwn/if_bwn_bhnd.c	Thu Dec 14 06:45:04 2017	(r326841)
@@ -68,11 +68,14 @@ __FBSDID("$FreeBSD$");
 #include "if_bwnvar.h"
 
 /* Supported device identifiers */
+#define	BWN_DEV(_hwrev)	{{					\
+	BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_D11),	\
+	BHND_MATCH_CORE_REV(_hwrev),				\
+}}
+
 static const struct bhnd_device bwn_devices[] = {
-	{{
-		BHND_MATCH_CORE		(BHND_MFGID_BCM, BHND_COREID_D11),
-		BHND_MATCH_CORE_REV	(HWREV_RANGE(5, 16))
-	}},
+	BWN_DEV(HWREV_RANGE(5, 16)),
+	BWN_DEV(HWREV_EQ(23)),
 
 	BHND_DEVICE_END
 };

Modified: head/sys/dev/bwn/if_bwn_pci.c
==============================================================================
--- head/sys/dev/bwn/if_bwn_pci.c	Thu Dec 14 04:41:07 2017	(r326840)
+++ head/sys/dev/bwn/if_bwn_pci.c	Thu Dec 14 06:45:04 2017	(r326841)
@@ -98,6 +98,7 @@ static const struct bwn_pci_device bcma_devices[] = {
 	BWN_BCM_DEV(BCM4331_D11N2G,	"BCM4331 802.11n 2GHz",		0),
 	BWN_BCM_DEV(BCM4331_D11N5G,	"BCM4331 802.11n 5GHz",		0),
 	BWN_BCM_DEV(BCM43224_D11N,	"BCM43224 802.11n Dual-Band",	0),
+	BWN_BCM_DEV(BCM43224_D11N_ID_VEN1, "BCM43224 802.11n Dual-Band",0),
 	BWN_BCM_DEV(BCM43225_D11N2G,	"BCM43225 802.11n 2GHz",	0),
 
 	{ 0, 0, NULL, 0}

Modified: head/sys/dev/bwn/if_bwnreg.h
==============================================================================
--- head/sys/dev/bwn/if_bwnreg.h	Thu Dec 14 04:41:07 2017	(r326840)
+++ head/sys/dev/bwn/if_bwnreg.h	Thu Dec 14 06:45:04 2017	(r326841)
@@ -410,6 +410,7 @@
 #define	BWN_DMA32_TXCTL			0x00
 #define	BWN_DMA32_TXENABLE		0x00000001
 #define	BWN_DMA32_TXSUSPEND		0x00000002
+#define	BWN_DMA32_TXPARITY_DISABLE	0x00000800
 #define	BWN_DMA32_TXADDREXT_MASK	0x00030000
 #define	BWN_DMA32_TXADDREXT_SHIFT	16
 #define	BWN_DMA32_TXRING		0x04
@@ -423,6 +424,7 @@
 #define	BWN_DMA32_RXENABLE		0x00000001
 #define	BWN_DMA32_RXFROFF_SHIFT		1
 #define	BWN_DMA32_RXDIRECTFIFO		0x00000100
+#define	BWN_DMA32_RXPARITY_DISABLE	0x00000800
 #define	BWN_DMA32_RXADDREXT_MASK	0x00030000
 #define	BWN_DMA32_RXADDREXT_SHIFT	16
 #define	BWN_DMA32_RXRING		0x14
@@ -434,6 +436,7 @@
 #define	BWN_DMA64_TXCTL			0x00
 #define	BWN_DMA64_TXENABLE		0x00000001
 #define	BWN_DMA64_TXSUSPEND		0x00000002
+#define	BWN_DMA64_TXPARITY_DISABLE	0x00000800
 #define	BWN_DMA64_TXADDREXT_MASK	0x00030000
 #define	BWN_DMA64_TXADDREXT_SHIFT	16
 #define	BWN_DMA64_TXINDEX		0x04
@@ -448,6 +451,7 @@
 #define	BWN_DMA64_RXENABLE		0x00000001
 #define	BWN_DMA64_RXFROFF_SHIFT		1
 #define	BWN_DMA64_RXDIRECTFIFO		0x00000100
+#define	BWN_DMA64_RXPARITY_DISABLE	0x00000800
 #define	BWN_DMA64_RXADDREXT_MASK	0x00030000
 #define	BWN_DMA64_RXADDREXT_SHIFT	16
 #define	BWN_DMA64_RXINDEX		0x24



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