From owner-freebsd-questions@FreeBSD.ORG Tue Jun 13 06:45:34 2006 Return-Path: X-Original-To: freebsd-questions@freebsd.org Delivered-To: freebsd-questions@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id A1DDA16A41A for ; Tue, 13 Jun 2006 06:45:34 +0000 (UTC) (envelope-from mdw@umich.edu) Received: from quince.ifs.umich.edu (quince.ifs.umich.edu [141.213.229.138]) by mx1.FreeBSD.org (Postfix) with SMTP id 2F0E543D46 for ; Tue, 13 Jun 2006 06:45:34 +0000 (GMT) (envelope-from mdw@umich.edu) Received: from sisyphus.ifs.umich.edu (sisyphus.ifs.umich.edu [141.211.14.215]) by quince.ifs.umich.edu (8.6.13/8.6.12) with ESMTP id CAA16535; Tue, 13 Jun 2006 02:45:06 -0400 Message-Id: <200606130645.CAA16535@quince.ifs.umich.edu> To: Otto Moerbeek In-reply-to: Your message of "Tue, 13 Jun 2006 08:03:17 +0200." Date: Tue, 13 Jun 2006 02:45:06 -0400 From: Marcus Watts X-Mailman-Approved-At: Tue, 13 Jun 2006 11:45:21 +0000 Cc: John Nemeth , misc@openbsd.org, Ted Unangst , Ted Mittelstaedt , freebsd-questions@freebsd.org, =?iso-8859-1?Q?H=E1morszky_Bal=E1zs?= , netbsd-users@NetBSD.org, Nikolas Britton Subject: Re: wikipedia article X-BeenThere: freebsd-questions@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: User questions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Jun 2006 06:45:34 -0000 Various wrote: > From: Otto Moerbeek > To: Ted Mittelstaedt ... > > What was the bit size of the CPU's originally used to write UNIX in Bell > > Labs? > > What's more, iirc the MMU of the pdp11 isn't what we call a MMU today, > it could not even do paging. The pdp-11 mmu could handle program relocation, segmentation (after a fashion) and memory protection. I'm not sure what more you could expect from an mmu. What you mean by "paging" is probably "demand paging", which means the ability to run a program without requiring that it be entirely resident. The key feature you need for that is a guarantee that any instruction fault caused by missing memory can be either restarted or continued. In most architectures that's a question of cpu design not mmu. In the case of the pdp-11 that's mostly a moot point. The pdp-11 only provides for mapping the 64k of memory space into into 8 segments (addressable on 64-byte "clicks") and there's just not much win to demand paging 8 "pages". (actually 6 x 8 pages; there was kernel, user, and supervisor mode, & each had separate instruction and data spaces, but supervisor mode was rarely used in Unix environments, and only a few large user mode programs ran using split I/D space.) For what it's worth, though, I *think* it was possible to restart most instructions on the /45 and /70, which were the "big" machines and the primary target of most later pdp-11 work. In fact, some use was made of this feature -- automatic stack growth. If you look through ancient Unix source, you'll find interesting bits of kernel code that manage this. There's actually a cheesy way to do demand paging with microprocessors that don't support demand paging (such as the original 68000--another "16 bit" machine). The way to do this is to run two processors in parallel but skewed by one instruction. If the first one does a bad memory fetch, then the second one will not have fetched the instruction causing the fault so contains restartable machine state. Masscomp sold a machine like this once. -Marcus Watts