From owner-freebsd-hackers Sat Nov 16 09:01:12 1996 Return-Path: owner-hackers Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id JAA07928 for hackers-outgoing; Sat, 16 Nov 1996 09:01:12 -0800 (PST) Received: from godzilla.zeta.org.au (godzilla.zeta.org.au [203.2.228.19]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id JAA07919; Sat, 16 Nov 1996 09:01:04 -0800 (PST) Received: (from bde@localhost) by godzilla.zeta.org.au (8.7.6/8.6.9) id DAA23158; Sun, 17 Nov 1996 03:57:21 +1100 Date: Sun, 17 Nov 1996 03:57:21 +1100 From: Bruce Evans Message-Id: <199611161657.DAA23158@godzilla.zeta.org.au> To: bde@zeta.org.au, se@freebsd.org Subject: Re: IRQ sharing on PCI? Cc: hackers@freebsd.org, mrcpu@cdsnet.net Sender: owner-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk >> >This depends on the PCI BIOS, which is free >> >to assign any IRQ to any PCI Int line. >> >PCI requires shared interrupts to work, since >> >there are far less real interrupt request >> >inputs in a typical system, than independent >> >PCI Int lines. >... >This means that there are in fact four PCI Int lines, but >most PCI cards will only use Int A. multi-function devices >will use Int A and Int B, if two functions are implemented >(see the AMD SCSI+Ethernet Combo chip), or all four lines >if there are four functions on a chip (announced 4 channel >Ethernet cards). And if you are using a PCI to PCI bridge >(current 4 channel Ethernet cards and the AH3940 or PCI bus >extender boxes, for example), then the PCI Int lines used >will depend on the slots used on the secondary side of the >PCI bridge. (The scheme used is meant to randomize PCI Int But these aren't typical :-). Now that Pentiums and PCI are common in typical (cheap) systems, I guess that a typical PCI system has 0 or 1 (unused) PCI interrupts depending on whether vga0 has one :-]. Why aren't PCI interrupts used for motherboard i/o, at least optionally? BTW, `pciconf -r' dumps core after printing the usage message. Bruce Bruce