From owner-freebsd-arm@FreeBSD.ORG Mon Jul 11 09:53:00 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 36236106564A for ; Mon, 11 Jul 2011 09:53:00 +0000 (UTC) (envelope-from mlfbsd@kanar.ci0.org) Received: from kanar.ci0.org (unknown [IPv6:2a01:e0b:1:50:40:63ff:feea:93a]) by mx1.freebsd.org (Postfix) with ESMTP id C84108FC14 for ; Mon, 11 Jul 2011 09:52:59 +0000 (UTC) Received: from kanar.ci0.org (pluxor@localhost [127.0.0.1]) by kanar.ci0.org (8.14.2/8.14.3) with ESMTP id p6B9sNp3089529; Mon, 11 Jul 2011 11:54:23 +0200 (CEST) (envelope-from mlfbsd@kanar.ci0.org) Received: (from mlfbsd@localhost) by kanar.ci0.org (8.14.2/8.14.3/Submit) id p6B9sMAs089526; Mon, 11 Jul 2011 11:54:22 +0200 (CEST) (envelope-from mlfbsd) Date: Mon, 11 Jul 2011 11:54:22 +0200 From: Olivier Houchard To: Damjan Marion Message-ID: <20110711095422.GA89207@ci0.org> References: <20110708120025.5C94210656D9@hub.freebsd.org> <1310178351.5681.4.camel@bmcgover-laptop.beta.com> <4E18403C.8010203@gmail.com> <1310344111.1455.3.camel@bmcgover-laptop.beta.com> <4E1A4F18.5000802@gmail.com> <37DEC7D2-5B25-4FD4-B3D8-02D945516A87@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <37DEC7D2-5B25-4FD4-B3D8-02D945516A87@gmail.com> User-Agent: Mutt/1.4.2.1i Cc: "Brian J. McGovern" , freebsd-arm@freebsd.org Subject: Re: Suggestions for arm build for qemu? X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Jul 2011 09:53:00 -0000 On Mon, Jul 11, 2011 at 11:13:02AM +0200, Damjan Marion wrote: > > On Jul 11, 2011, at 3:17 AM, Mark Tinguely wrote: > > > With option ARM_CACHE_LOCK_ENABLE compiled into the kernel, qemu will give an illegal instruction error. > > Huh, nice to know. I patched qemu to ignore this instruction :) > > BTW Any idea from where (c9, c2, {0, 0}) is coming from? I was not able to find it in ARM ARM. > Hi, It may be an xscale-only thing. Regards, Olivier