From owner-svn-src-all@FreeBSD.ORG Wed Oct 16 15:20:28 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 440305AF; Wed, 16 Oct 2013 15:20:28 +0000 (UTC) (envelope-from br@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 31BE82647; Wed, 16 Oct 2013 15:20:28 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r9GFKRUc093758; Wed, 16 Oct 2013 15:20:27 GMT (envelope-from br@svn.freebsd.org) Received: (from br@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r9GFKRC6093755; Wed, 16 Oct 2013 15:20:27 GMT (envelope-from br@svn.freebsd.org) Message-Id: <201310161520.r9GFKRC6093755@svn.freebsd.org> From: Ruslan Bukin Date: Wed, 16 Oct 2013 15:20:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r256629 - in head/sys/arm: arm include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Oct 2013 15:20:28 -0000 Author: br Date: Wed Oct 16 15:20:27 2013 New Revision: 256629 URL: http://svnweb.freebsd.org/changeset/base/256629 Log: Add CPU ID for ARM Cortex A5. Approved by: cognet (mentor) Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/identcpu.c head/sys/arm/include/armreg.h Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Wed Oct 16 14:24:22 2013 (r256628) +++ head/sys/arm/arm/cpufunc.c Wed Oct 16 15:20:27 2013 (r256629) @@ -1476,7 +1476,8 @@ set_cpufuncs() } #endif /* CPU_ARM1136 || CPU_ARM1176 */ #ifdef CPU_CORTEXA - if (cputype == CPU_ID_CORTEXA7 || + if (cputype == CPU_ID_CORTEXA5 || + cputype == CPU_ID_CORTEXA7 || cputype == CPU_ID_CORTEXA8R1 || cputype == CPU_ID_CORTEXA8R2 || cputype == CPU_ID_CORTEXA8R3 || Modified: head/sys/arm/arm/identcpu.c ============================================================================== --- head/sys/arm/arm/identcpu.c Wed Oct 16 14:24:22 2013 (r256628) +++ head/sys/arm/arm/identcpu.c Wed Oct 16 15:20:27 2013 (r256629) @@ -236,6 +236,8 @@ const struct cpuidtab cpuids[] = { { CPU_ID_ARM1026EJS, CPU_CLASS_ARM10EJ, "ARM1026EJ-S", generic_steppings }, + { CPU_ID_CORTEXA5, CPU_CLASS_CORTEXA, "Cortex A5", + generic_steppings }, { CPU_ID_CORTEXA7, CPU_CLASS_CORTEXA, "Cortex A7", generic_steppings }, { CPU_ID_CORTEXA8R1, CPU_CLASS_CORTEXA, "Cortex A8-r1", Modified: head/sys/arm/include/armreg.h ============================================================================== --- head/sys/arm/include/armreg.h Wed Oct 16 14:24:22 2013 (r256628) +++ head/sys/arm/include/armreg.h Wed Oct 16 15:20:27 2013 (r256629) @@ -147,6 +147,7 @@ #define CPU_ID_ARM1136JS 0x4107b360 #define CPU_ID_ARM1136JSR1 0x4117b360 #define CPU_ID_ARM1176JZS 0x410fb760 +#define CPU_ID_CORTEXA5 0x410fc050 #define CPU_ID_CORTEXA7 0x410fc070 #define CPU_ID_CORTEXA8R1 0x411fc080 #define CPU_ID_CORTEXA8R2 0x412fc080