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From: Marius Strobl <marius@FreeBSD.org>
Date: Mon, 8 Sep 2008 21:24:25 +0000 (UTC)
To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org
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Cc: 
Subject: cvs commit: src/sys/sparc64/include asi.h tlb.h
 src/sys/sparc64/sparc64 cheetah.c genassym.c pmap.c swtch.S
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marius      2008-09-08 21:24:25 UTC

  FreeBSD src repository

  Modified files:
    sys/sparc64/include  asi.h tlb.h 
    sys/sparc64/sparc64  cheetah.c genassym.c pmap.c swtch.S 
  Log:
  SVN rev 182878 on 2008-09-08 21:24:25Z by marius
  
  For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages
  for all three contexts and configure the dt512_1 to hold 4MB pages for
  them (e.g. for direct mappings).
  This might allow for additional optimization by using the faulting
  page sizes provided by AA_DMMU_TAG_ACCESS_EXT for bypassing the page
  size walker for the dt512 in the superpage support code.
  
  Submitted by:   nwhitehorn (initial patch)
  
  Revision  Changes    Path
  1.14      +1 -0      src/sys/sparc64/include/asi.h
  1.28      +29 -2     src/sys/sparc64/include/tlb.h
  1.10      +20 -0     src/sys/sparc64/sparc64/cheetah.c
  1.74      +1 -0      src/sys/sparc64/sparc64/genassym.c
  1.177     +4 -3      src/sys/sparc64/sparc64/pmap.c
  1.37      +4 -0      src/sys/sparc64/sparc64/swtch.S