From owner-svn-src-all@FreeBSD.ORG Tue Dec 17 14:50:36 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A6EF8D78; Tue, 17 Dec 2013 14:50:36 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 872541ADB; Tue, 17 Dec 2013 14:50:36 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rBHEoajx009880; Tue, 17 Dec 2013 14:50:36 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.7/8.14.7/Submit) id rBHEoaeB009878; Tue, 17 Dec 2013 14:50:36 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201312171450.rBHEoaeB009878@svn.freebsd.org> From: Nathan Whitehorn Date: Tue, 17 Dec 2013 14:50:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r259513 - in head/sys: dev/ofw powerpc/ofw X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Dec 2013 14:50:36 -0000 Author: nwhitehorn Date: Tue Dec 17 14:50:35 2013 New Revision: 259513 URL: http://svnweb.freebsd.org/changeset/base/259513 Log: Configure interrupt sense based on device tree information. This extends the OF interrupt map API to return sense information to the caller and the PowerPC Open Firmware PCI base driver to use it to program the PIC. Modified: head/sys/dev/ofw/ofw_bus_subr.c head/sys/powerpc/ofw/ofw_pci.c Modified: head/sys/dev/ofw/ofw_bus_subr.c ============================================================================== --- head/sys/dev/ofw/ofw_bus_subr.c Tue Dec 17 13:49:35 2013 (r259512) +++ head/sys/dev/ofw/ofw_bus_subr.c Tue Dec 17 14:50:35 2013 (r259513) @@ -285,7 +285,7 @@ ofw_bus_lookup_imap(phandle_t node, stru * maskbuf must point to a buffer of length physsz + intrsz. * The interrupt is returned in result, which must point to a buffer of length * rintrsz (which gives the expected size of the mapped interrupt). - * Returns 1 if a mapping was found, 0 otherwise. + * Returns number of cells in the interrupt if a mapping was found, 0 otherwise. */ int ofw_bus_search_intrmap(void *intr, int intrsz, void *regs, int physsz, @@ -325,19 +325,13 @@ ofw_bus_search_intrmap(void *intr, int i tsz = physsz + intrsz + sizeof(phandle_t) + pintrsz; KASSERT(i >= tsz, ("ofw_bus_search_intrmap: truncated map")); - /* - * XXX: Apple hardware uses a second cell to set information - * on the interrupt trigger type. This information should - * be used somewhere to program the PIC. - */ - if (bcmp(ref, mptr, physsz + intrsz) == 0) { bcopy(mptr + physsz + intrsz + sizeof(parent), - result, rintrsz); + result, MIN(rintrsz, pintrsz)); if (iparent != NULL) *iparent = parent; - return (1); + return (pintrsz/sizeof(pcell_t)); } mptr += tsz; i -= tsz; Modified: head/sys/powerpc/ofw/ofw_pci.c ============================================================================== --- head/sys/powerpc/ofw/ofw_pci.c Tue Dec 17 13:49:35 2013 (r259512) +++ head/sys/powerpc/ofw/ofw_pci.c Tue Dec 17 14:50:35 2013 (r259513) @@ -256,7 +256,8 @@ ofw_pci_route_interrupt(device_t bus, de { struct ofw_pci_softc *sc; struct ofw_pci_register reg; - uint32_t pintr, mintr; + uint32_t pintr, mintr[2]; + int intrcells; phandle_t iparent; uint8_t maskbuf[sizeof(reg) + sizeof(pintr)]; @@ -269,10 +270,15 @@ ofw_pci_route_interrupt(device_t bus, de (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) | (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT); - if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, ®, - sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr), - &iparent, maskbuf)) - return (ofw_bus_map_intr(dev, iparent, mintr)); + intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), + &sc->sc_pci_iinfo, ®, sizeof(reg), &pintr, sizeof(pintr), + mintr, sizeof(mintr), &iparent, maskbuf); + if (intrcells) { + pintr = ofw_bus_map_intr(dev, iparent, mintr[0]); + if (intrcells == 2) + ofw_bus_config_intr(dev, pintr, mintr[1]); + return (pintr); + } /* Maybe it's a real interrupt, not an intpin */ if (pin > 4)