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Date:      Tue, 12 Jul 2022 18:34:04 GMT
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 72e9fd9daa3f - stable/13 - Apply tentative llvm fix for avoiding fma on PowerPC SPE
Message-ID:  <202207121834.26CIY4Sw047850@gitrepo.freebsd.org>

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The branch stable/13 has been updated by dim:

URL: https://cgit.FreeBSD.org/src/commit/?id=72e9fd9daa3fe85415a663100f711e784435d7b6

commit 72e9fd9daa3fe85415a663100f711e784435d7b6
Author:     Dimitry Andric <dim@FreeBSD.org>
AuthorDate: 2022-07-09 13:03:54 +0000
Commit:     Dimitry Andric <dim@FreeBSD.org>
CommitDate: 2022-07-12 18:29:55 +0000

    Apply tentative llvm fix for avoiding fma on PowerPC SPE
    
    Merge llvm review D77558, by Justin Hibbits:
    
      PowerPC: Don't hoist float multiply + add to fused operation on SPE
    
      SPE doesn't have a fmadd instruction, so don't bother hoisting a
      multiply and add sequence to this, as it'd become just a library call.
      Hoisting happens too late for the CTR usability test to veto using the CTR
      in a loop, and results in an assert "Invalid PPC CTR loop!".
    
    Reported by:            alfredo
    Obtained from:          https://reviews.llvm.org/D77558
    MFC after:              3 days
    
    (cherry picked from commit 9ef1127008ce94cf626daed346a3c1ee03063617)
---
 contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index d9d37638c8a7..f4aa38733fef 100644
--- a/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -16623,6 +16623,8 @@ bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
                                                    Type *Ty) const {
+  if (Subtarget.hasSPE())
+    return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
   case Type::DoubleTyID:



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