Date: Sat, 8 Jun 2024 15:31:12 GMT From: Yuri Victorovich <yuri@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: ca43cdbcc4e8 - main - cad/yosys: update 0.41 =?utf-8?Q?=E2=86=92?= 0.42 Message-ID: <202406081531.458FVCco085770@gitrepo.freebsd.org>
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The branch main has been updated by yuri: URL: https://cgit.FreeBSD.org/ports/commit/?id=ca43cdbcc4e8034ab077dd4c0de31f3b4c15dd85 commit ca43cdbcc4e8034ab077dd4c0de31f3b4c15dd85 Author: Yuri Victorovich <yuri@FreeBSD.org> AuthorDate: 2024-06-08 08:04:11 +0000 Commit: Yuri Victorovich <yuri@FreeBSD.org> CommitDate: 2024-06-08 15:31:08 +0000 cad/yosys: update 0.41 → 0.42 Reported by: portscout --- cad/yosys/Makefile | 2 +- cad/yosys/distinfo | 6 +++--- cad/yosys/pkg-plist | 5 +---- 3 files changed, 5 insertions(+), 8 deletions(-) diff --git a/cad/yosys/Makefile b/cad/yosys/Makefile index f7cfcebf834e..b5c6d09fd35c 100644 --- a/cad/yosys/Makefile +++ b/cad/yosys/Makefile @@ -1,6 +1,6 @@ PORTNAME= yosys DISTVERSIONPREFIX= yosys- -DISTVERSION= 0.41 +DISTVERSION= 0.42 CATEGORIES= cad MAINTAINER= yuri@FreeBSD.org diff --git a/cad/yosys/distinfo b/cad/yosys/distinfo index 0e81fd92adb1..21c7492ec07a 100644 --- a/cad/yosys/distinfo +++ b/cad/yosys/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1716572266 -SHA256 (YosysHQ-yosys-yosys-0.41_GH0.tar.gz) = b0037d0a5864550a07a72ba81346e52a7d5f76b3027ef1d7c71b975d2c8bd2b2 -SIZE (YosysHQ-yosys-yosys-0.41_GH0.tar.gz) = 2808657 +TIMESTAMP = 1717824447 +SHA256 (YosysHQ-yosys-yosys-0.42_GH0.tar.gz) = 359714de8378665edebfacdf996b5f4f2fa55bf33071fc92ad6e08b5c4bdb648 +SIZE (YosysHQ-yosys-yosys-0.42_GH0.tar.gz) = 2807211 diff --git a/cad/yosys/pkg-plist b/cad/yosys/pkg-plist index dcce7e394e38..3215483cdf07 100644 --- a/cad/yosys/pkg-plist +++ b/cad/yosys/pkg-plist @@ -101,9 +101,9 @@ bin/yosys-witness %%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc %%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h %%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h -%%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h %%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h %%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h +%%DATADIR%%/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h %%DATADIR%%/include/backends/rtlil/rtlil_backend.h %%DATADIR%%/include/frontends/ast/ast.h %%DATADIR%%/include/frontends/ast/ast_binding.h @@ -164,8 +164,6 @@ bin/yosys-witness %%DATADIR%%/intel_alm/common/arith_alm_map.v %%DATADIR%%/intel_alm/common/bram_m10k.txt %%DATADIR%%/intel_alm/common/bram_m10k_map.v -%%DATADIR%%/intel_alm/common/bram_m20k.txt -%%DATADIR%%/intel_alm/common/bram_m20k_map.v %%DATADIR%%/intel_alm/common/dff_map.v %%DATADIR%%/intel_alm/common/dff_sim.v %%DATADIR%%/intel_alm/common/dsp_map.v @@ -174,7 +172,6 @@ bin/yosys-witness %%DATADIR%%/intel_alm/common/megafunction_bb.v %%DATADIR%%/intel_alm/common/mem_sim.v %%DATADIR%%/intel_alm/common/misc_sim.v -%%DATADIR%%/intel_alm/common/quartus_rename.v %%DATADIR%%/intel_alm/cyclonev/cells_sim.v %%DATADIR%%/lattice/arith_map_ccu2c.v %%DATADIR%%/lattice/arith_map_ccu2d.v
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