From owner-svn-src-head@FreeBSD.ORG Thu Jul 15 03:56:09 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 28F051065677; Thu, 15 Jul 2010 03:56:09 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id F2ECC8FC0C; Thu, 15 Jul 2010 03:56:08 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o6F3u8Aa071655; Thu, 15 Jul 2010 03:56:08 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o6F3u8Y9071652; Thu, 15 Jul 2010 03:56:08 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <201007150356.o6F3u8Y9071652@svn.freebsd.org> From: Warner Losh Date: Thu, 15 Jul 2010 03:56:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r210105 - head/sys/mips/include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Jul 2010 03:56:09 -0000 Author: imp Date: Thu Jul 15 03:56:08 2010 New Revision: 210105 URL: http://svn.freebsd.org/changeset/base/210105 Log: Move TLB definitions to tlb.h Modified: head/sys/mips/include/cpu.h head/sys/mips/include/tlb.h Modified: head/sys/mips/include/cpu.h ============================================================================== --- head/sys/mips/include/cpu.h Thu Jul 15 03:36:50 2010 (r210104) +++ head/sys/mips/include/cpu.h Thu Jul 15 03:56:08 2010 (r210105) @@ -62,24 +62,6 @@ /* END: These are going away */ /* - * The first TLB entry that write random hits. - * TLB entry 0 maps the kernel stack of the currently running thread - * TLB entry 1 maps the pcpu area of processor (only for SMP builds) - */ -#define KSTACK_TLB_ENTRY 0 -#ifdef SMP -#define PCPU_TLB_ENTRY 1 -#define VMWIRED_ENTRIES 2 -#else -#define VMWIRED_ENTRIES 1 -#endif /* SMP */ - -/* - * The number of process id entries. - */ -#define VMNUM_PIDS 256 - -/* * Exported definitions unique to mips cpu support. */ Modified: head/sys/mips/include/tlb.h ============================================================================== --- head/sys/mips/include/tlb.h Thu Jul 15 03:36:50 2010 (r210104) +++ head/sys/mips/include/tlb.h Thu Jul 15 03:56:08 2010 (r210105) @@ -29,12 +29,31 @@ #ifndef _MACHINE_TLB_H_ #define _MACHINE_TLB_H_ +/* + * The first TLB entry that write random hits. + * TLB entry 0 maps the kernel stack of the currently running thread + * TLB entry 1 maps the pcpu area of processor (only for SMP builds) + */ +#define KSTACK_TLB_ENTRY 0 +#ifdef SMP +#define PCPU_TLB_ENTRY 1 +#define VMWIRED_ENTRIES 2 +#else +#define VMWIRED_ENTRIES 1 +#endif /* SMP */ + +/* + * The number of process id entries. + */ +#define VMNUM_PIDS 256 + +extern int num_tlbentries; + void tlb_insert_wired(unsigned, vm_offset_t, pt_entry_t, pt_entry_t); void tlb_invalidate_address(struct pmap *, vm_offset_t); void tlb_invalidate_all(void); void tlb_invalidate_all_user(struct pmap *); void tlb_save(void); void tlb_update(struct pmap *, vm_offset_t, pt_entry_t); -extern int num_tlbentries; #endif /* !_MACHINE_TLB_H_ */