From owner-svn-src-all@freebsd.org Wed Nov 25 11:19:42 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id A5EC247DFD5; Wed, 25 Nov 2020 11:19:42 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Cgz1p4HVqz4tk1; Wed, 25 Nov 2020 11:19:42 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 85ED17F72; Wed, 25 Nov 2020 11:19:42 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0APBJg66078433; Wed, 25 Nov 2020 11:19:42 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0APBJg1K078432; Wed, 25 Nov 2020 11:19:42 GMT (envelope-from manu@FreeBSD.org) Message-Id: <202011251119.0APBJg1K078432@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Wed, 25 Nov 2020 11:19:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r368016 - head/sys/arm/allwinner/clkng X-SVN-Group: head X-SVN-Commit-Author: manu X-SVN-Commit-Paths: head/sys/arm/allwinner/clkng X-SVN-Commit-Revision: 368016 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Nov 2020 11:19:42 -0000 Author: manu Date: Wed Nov 25 11:19:42 2020 New Revision: 368016 URL: https://svnweb.freebsd.org/changeset/base/368016 Log: arm64: allwinner: H6: Fix pll 4x clocks The clock configured by the registers are the 4x version not the 1x. Modified: head/sys/arm/allwinner/clkng/ccu_h6.c Modified: head/sys/arm/allwinner/clkng/ccu_h6.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_h6.c Wed Nov 25 10:56:38 2020 (r368015) +++ head/sys/arm/allwinner/clkng/ccu_h6.c Wed Nov 25 11:19:42 2020 (r368016) @@ -196,10 +196,10 @@ NMM_CLK(pll_ddr0_clk, 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -static const char *pll_peri0_parents[] = {"osc24M"}; -NMM_CLK(pll_peri0_clk, - CLK_PLL_PERIPH0, /* id */ - "pll_periph0", pll_peri0_parents, /* name, parents */ +static const char *pll_peri0_4x_parents[] = {"osc24M"}; +NMM_CLK(pll_peri0_4x_clk, + CLK_PLL_PERIPH0_4X, /* id */ + "pll_periph0_4x", pll_peri0_4x_parents, /* name, parents */ 0x20, /* offset */ 8, 7, 0, 0, /* n factor */ 0, 1, 0, 0, /* m0 factor */ @@ -207,7 +207,7 @@ NMM_CLK(pll_peri0_clk, 31, /* gate */ 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -static const char *pll_peri0_2x_parents[] = {"pll_periph0"}; +static const char *pll_peri0_2x_parents[] = {"pll_periph0_4x"}; FIXED_CLK(pll_peri0_2x_clk, CLK_PLL_PERIPH0_2X, /* id */ "pll_periph0_2x", /* name */ @@ -216,20 +216,20 @@ FIXED_CLK(pll_peri0_2x_clk, 1, /* mult */ 2, /* div */ 0); /* flags */ -static const char *pll_peri0_4x_parents[] = {"pll_periph0"}; -FIXED_CLK(pll_peri0_4x_clk, - CLK_PLL_PERIPH0_4X, /* id */ - "pll_periph0_4x", /* name */ - pll_peri0_4x_parents, /* parent */ +static const char *pll_peri0_parents[] = {"pll_periph0_4x"}; +FIXED_CLK(pll_peri0_clk, + CLK_PLL_PERIPH0, /* id */ + "pll_periph0", /* name */ + pll_peri0_parents, /* parent */ 0, /* freq */ 1, /* mult */ 4, /* div */ 0); /* flags */ -static const char *pll_peri1_parents[] = {"osc24M"}; -NMM_CLK(pll_peri1_clk, - CLK_PLL_PERIPH1, /* id */ - "pll_periph1", pll_peri1_parents, /* name, parents */ +static const char *pll_peri1_4x_parents[] = {"osc24M"}; +NMM_CLK(pll_peri1_4x_clk, + CLK_PLL_PERIPH1_4X, /* id */ + "pll_periph1_4x", pll_peri1_4x_parents, /* name, parents */ 0x28, /* offset */ 8, 7, 0, 0, /* n factor */ 0, 1, 0, 0, /* m0 factor */ @@ -237,7 +237,7 @@ NMM_CLK(pll_peri1_clk, 31, /* gate */ 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -static const char *pll_peri1_2x_parents[] = {"pll_periph1"}; +static const char *pll_peri1_2x_parents[] = {"pll_periph1_4x"}; FIXED_CLK(pll_peri1_2x_clk, CLK_PLL_PERIPH1_2X, /* id */ "pll_periph1_2x", /* name */ @@ -246,11 +246,11 @@ FIXED_CLK(pll_peri1_2x_clk, 1, /* mult */ 2, /* div */ 0); /* flags */ -static const char *pll_peri1_4x_parents[] = {"pll_periph1"}; -FIXED_CLK(pll_peri1_4x_clk, - CLK_PLL_PERIPH1_4X, /* id */ - "pll_periph1_4x", /* name */ - pll_peri1_4x_parents, /* parent */ +static const char *pll_peri1_parents[] = {"pll_periph1_4x"}; +FIXED_CLK(pll_peri1_clk, + CLK_PLL_PERIPH1, /* id */ + "pll_periph1", /* name */ + pll_peri1_parents, /* parent */ 0, /* freq */ 1, /* mult */ 4, /* div */ @@ -268,10 +268,10 @@ NMM_CLK(pll_gpu_clk, 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -static const char *pll_video0_parents[] = {"osc24M"}; -NMM_CLK(pll_video0_clk, - CLK_PLL_VIDEO0, /* id */ - "pll_video0", pll_video0_parents, /* name, parents */ +static const char *pll_video0_4x_parents[] = {"osc24M"}; +NMM_CLK(pll_video0_4x_clk, + CLK_PLL_VIDEO0_4X, /* id */ + "pll_video0_4x", pll_video0_4x_parents, /* name, parents */ 0x40, /* offset */ 8, 7, 0, 0, /* n factor */ 0, 1, 0, 0, /* m0 factor */ @@ -279,20 +279,20 @@ NMM_CLK(pll_video0_clk, 31, /* gate */ 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -static const char *pll_video0_4x_parents[] = {"pll_video0"}; -FIXED_CLK(pll_video0_4x_clk, - CLK_PLL_VIDEO0_4X, /* id */ - "pll_video0_4x", /* name */ - pll_video0_4x_parents, /* parent */ +static const char *pll_video0_parents[] = {"pll_video0_4x"}; +FIXED_CLK(pll_video0_clk, + CLK_PLL_VIDEO0, /* id */ + "pll_video0", /* name */ + pll_video0_parents, /* parent */ 0, /* freq */ 1, /* mult */ 4, /* div */ 0); /* flags */ -static const char *pll_video1_parents[] = {"osc24M"}; -NMM_CLK(pll_video1_clk, - CLK_PLL_VIDEO1, /* id */ - "pll_video1", pll_video1_parents, /* name, parents */ +static const char *pll_video1_4x_parents[] = {"osc24M"}; +NMM_CLK(pll_video1_4x_clk, + CLK_PLL_VIDEO1_4X, /* id */ + "pll_video1_4x", pll_video1_4x_parents, /* name, parents */ 0x48, /* offset */ 8, 7, 0, 0, /* n factor */ 0, 1, 0, 0, /* m0 factor */ @@ -300,11 +300,11 @@ NMM_CLK(pll_video1_clk, 31, /* gate */ 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -static const char *pll_video1_4x_parents[] = {"pll_video1"}; -FIXED_CLK(pll_video1_4x_clk, - CLK_PLL_VIDEO1_4X, /* id */ - "pll_video1_4x", /* name */ - pll_video1_4x_parents, /* parent */ +static const char *pll_video1_parents[] = {"pll_video1_4x"}; +FIXED_CLK(pll_video1_clk, + CLK_PLL_VIDEO1, /* id */ + "pll_video1", /* name */ + pll_video1_parents, /* parent */ 0, /* freq */ 1, /* mult */ 4, /* div */ @@ -426,11 +426,11 @@ NM_CLK(mmc2_clk, static struct aw_ccung_clk h6_ccu_clks[] = { { .type = AW_CLK_NP, .clk.np = &pll_cpux_clk}, { .type = AW_CLK_NMM, .clk.nmm = &pll_ddr0_clk}, - { .type = AW_CLK_NMM, .clk.nmm = &pll_peri0_clk}, - { .type = AW_CLK_NMM, .clk.nmm = &pll_peri1_clk}, + { .type = AW_CLK_NMM, .clk.nmm = &pll_peri0_4x_clk}, + { .type = AW_CLK_NMM, .clk.nmm = &pll_peri1_4x_clk}, { .type = AW_CLK_NMM, .clk.nmm = &pll_gpu_clk}, - { .type = AW_CLK_NMM, .clk.nmm = &pll_video0_clk}, - { .type = AW_CLK_NMM, .clk.nmm = &pll_video1_clk}, + { .type = AW_CLK_NMM, .clk.nmm = &pll_video0_4x_clk}, + { .type = AW_CLK_NMM, .clk.nmm = &pll_video1_4x_clk}, { .type = AW_CLK_NMM, .clk.nmm = &pll_ve_clk}, { .type = AW_CLK_NMM, .clk.nmm = &pll_de_clk}, { .type = AW_CLK_NMM, .clk.nmm = &pll_hsic_clk}, @@ -446,11 +446,11 @@ static struct aw_ccung_clk h6_ccu_clks[] = { { .type = AW_CLK_FIXED, .clk.fixed = &osc12m_clk}, { .type = AW_CLK_FIXED, .clk.fixed = &pll_peri0_2x_clk}, - { .type = AW_CLK_FIXED, .clk.fixed = &pll_peri0_4x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_peri0_clk}, { .type = AW_CLK_FIXED, .clk.fixed = &pll_peri1_2x_clk}, - { .type = AW_CLK_FIXED, .clk.fixed = &pll_peri1_4x_clk}, - { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_4x_clk}, - { .type = AW_CLK_FIXED, .clk.fixed = &pll_video1_4x_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_peri1_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_clk}, + { .type = AW_CLK_FIXED, .clk.fixed = &pll_video1_clk}, }; static int