From owner-freebsd-smp Fri Jan 11 22:36:53 2002 Delivered-To: freebsd-smp@freebsd.org Received: from mailman.zeta.org.au (mailman.zeta.org.au [203.26.10.16]) by hub.freebsd.org (Postfix) with ESMTP id B376637B41B; Fri, 11 Jan 2002 22:36:49 -0800 (PST) Received: from bde.zeta.org.au (bde.zeta.org.au [203.2.228.102]) by mailman.zeta.org.au (8.9.3/8.8.7) with ESMTP id RAA27163; Sat, 12 Jan 2002 17:35:59 +1100 Date: Sat, 12 Jan 2002 17:36:43 +1100 (EST) From: Bruce Evans X-X-Sender: To: Peter Wemm Cc: Mark Murray , Chris Faulhaber , , Subject: Re: P5 vs. SMP, part 2 In-Reply-To: <20020112034904.7784A38FD@overcee.netplex.com.au> Message-ID: <20020112173153.G4872-100000@gamplex.bde.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-freebsd-smp@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.org On Fri, 11 Jan 2002, Peter Wemm wrote: > The problem is that the AP cpus were running with the CR0_CD (cache disable) > and CR0_NW (cache writethrough, not writeback). This is very bad. :-] > > PPro and above bioses seem to cause the AP cpus enter the kernel with cache > enabled, so that this looks like it should be a p5/i586 problem only. Where were they set before? initcpu() has a mazing amount of code for setting these bits. We should set all CR* bits that we know and care about. We also sort of depend on BIOSes to clear CR4_TSD so that the TSC works in user mode. The TSC in user mode is not really supported, but I often use it. Bruce To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message