From owner-svn-src-stable@freebsd.org Thu Aug 18 10:53:05 2016 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 18C71BBE87D; Thu, 18 Aug 2016 10:53:05 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id C35A616E4; Thu, 18 Aug 2016 10:53:04 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u7IAr3vO030590; Thu, 18 Aug 2016 10:53:03 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u7IAr3PO030589; Thu, 18 Aug 2016 10:53:03 GMT (envelope-from mav@FreeBSD.org) Message-Id: <201608181053.u7IAr3PO030589@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Thu, 18 Aug 2016 10:53:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r304399 - stable/10/sys/dev/ntb/ntb_hw X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Aug 2016 10:53:05 -0000 Author: mav Date: Thu Aug 18 10:53:03 2016 New Revision: 304399 URL: https://svnweb.freebsd.org/changeset/base/304399 Log: MFC r302531: Revert odd change, setting limit registers before base. I don't know what errata is mentioned there, I was unable to find it, but setting limit before the base simply does not work at all. According to specification attempt to set limit out of the present window range resets it to zero, effectively disabling it. And that is what I see in practice. Fixing this properly disables access for remote side to our memory until respective xlat is negotiated and set. As I see, Linux does the same. Modified: stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c ============================================================================== --- stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c Thu Aug 18 10:52:29 2016 (r304398) +++ stable/10/sys/dev/ntb/ntb_hw/ntb_hw.c Thu Aug 18 10:53:03 2016 (r304399) @@ -1715,26 +1715,22 @@ xeon_set_sbar_base_and_limit(struct ntb_ bar_addr = 0; } - /* - * Set limit registers first to avoid an errata where setting the base - * registers locks the limit registers. - */ if (!bar_is_64bit(ntb, idx)) { - ntb_reg_write(4, lmt_reg, bar_addr); - reg_val = ntb_reg_read(4, lmt_reg); - (void)reg_val; - ntb_reg_write(4, base_reg, bar_addr); reg_val = ntb_reg_read(4, base_reg); (void)reg_val; - } else { - ntb_reg_write(8, lmt_reg, bar_addr); - reg_val = ntb_reg_read(8, lmt_reg); - (void)reg_val; + ntb_reg_write(4, lmt_reg, bar_addr); + reg_val = ntb_reg_read(4, lmt_reg); + (void)reg_val; + } else { ntb_reg_write(8, base_reg, bar_addr); reg_val = ntb_reg_read(8, base_reg); (void)reg_val; + + ntb_reg_write(8, lmt_reg, bar_addr); + reg_val = ntb_reg_read(8, lmt_reg); + (void)reg_val; } }