From owner-p4-projects@FreeBSD.ORG Sat Jan 10 13:34:43 2009 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id F0B5A1065673; Sat, 10 Jan 2009 13:34:42 +0000 (UTC) Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AFE82106564A for ; Sat, 10 Jan 2009 13:34:42 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 9BFCC8FC12 for ; Sat, 10 Jan 2009 13:34:42 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id n0ADYg2M063981 for ; Sat, 10 Jan 2009 13:34:42 GMT (envelope-from hselasky@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id n0ADYfUn063979 for perforce@freebsd.org; Sat, 10 Jan 2009 13:34:41 GMT (envelope-from hselasky@FreeBSD.org) Date: Sat, 10 Jan 2009 13:34:41 GMT Message-Id: <200901101334.n0ADYfUn063979@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky To: Perforce Change Reviews Cc: Subject: PERFORCE change 155909 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 10 Jan 2009 13:34:43 -0000 http://perforce.freebsd.org/chv.cgi?CH=155909 Change 155909 by hselasky@hselasky_laptop001 on 2009/01/10 13:33:47 IFC @ 155905 Affected files ... .. //depot/projects/usb/src/sys/amd64/amd64/identcpu.c#11 integrate .. //depot/projects/usb/src/sys/amd64/conf/GENERIC#18 integrate .. //depot/projects/usb/src/sys/amd64/include/cputypes.h#3 integrate .. //depot/projects/usb/src/sys/amd64/include/specialreg.h#11 integrate .. //depot/projects/usb/src/sys/arm/arm/cpufunc.c#8 integrate .. //depot/projects/usb/src/sys/arm/arm/cpufunc_asm_feroceon.S#2 delete .. //depot/projects/usb/src/sys/arm/arm/cpufunc_asm_sheeva.S#1 branch .. //depot/projects/usb/src/sys/arm/arm/elf_trampoline.c#9 integrate .. //depot/projects/usb/src/sys/arm/include/cpufunc.h#7 integrate .. //depot/projects/usb/src/sys/arm/mv/common.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/discovery/db78xxx.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/discovery/discovery.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/files.mv#3 integrate .. //depot/projects/usb/src/sys/arm/mv/gpio.c#2 integrate .. //depot/projects/usb/src/sys/arm/mv/kirkwood/db88f6xxx.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/kirkwood/kirkwood.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/mv_machdep.c#4 integrate .. //depot/projects/usb/src/sys/arm/mv/mv_pci.c#4 integrate .. //depot/projects/usb/src/sys/arm/mv/mvreg.h#3 integrate .. //depot/projects/usb/src/sys/arm/mv/mvvar.h#3 integrate .. //depot/projects/usb/src/sys/arm/mv/obio.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/orion/db88f5xxx.c#3 integrate .. //depot/projects/usb/src/sys/arm/mv/orion/orion.c#3 integrate .. //depot/projects/usb/src/sys/boot/forth/loader.4th#2 integrate .. //depot/projects/usb/src/sys/boot/forth/pnp.4th#2 integrate .. //depot/projects/usb/src/sys/boot/forth/support.4th#5 integrate .. //depot/projects/usb/src/sys/cam/cam_xpt.c#11 integrate .. //depot/projects/usb/src/sys/cam/cam_xpt_sim.h#3 integrate .. //depot/projects/usb/src/sys/cam/scsi/scsi_cd.c#8 integrate .. //depot/projects/usb/src/sys/conf/Makefile.arm#9 integrate .. //depot/projects/usb/src/sys/conf/NOTES#24 integrate .. //depot/projects/usb/src/sys/conf/files#46 integrate .. //depot/projects/usb/src/sys/conf/kern.post.mk#8 integrate .. //depot/projects/usb/src/sys/conf/options#16 integrate .. //depot/projects/usb/src/sys/dev/adb/adb_kbd.c#3 integrate .. //depot/projects/usb/src/sys/dev/ata/atapi-cam.c#8 integrate .. //depot/projects/usb/src/sys/dev/ath/ath_rate/amrr/amrr.c#8 integrate .. //depot/projects/usb/src/sys/dev/ath/ath_rate/onoe/onoe.c#8 integrate .. //depot/projects/usb/src/sys/dev/ath/ath_rate/sample/sample.c#8 integrate .. //depot/projects/usb/src/sys/dev/ath/if_ath.c#13 integrate .. //depot/projects/usb/src/sys/dev/ath/if_ath_pci.c#9 integrate .. //depot/projects/usb/src/sys/dev/ath/if_athioctl.h#5 integrate .. //depot/projects/usb/src/sys/dev/ath/if_athvar.h#11 integrate .. //depot/projects/usb/src/sys/dev/dcons/dcons_crom.c#4 integrate .. //depot/projects/usb/src/sys/dev/dcons/dcons_os.c#9 integrate .. //depot/projects/usb/src/sys/dev/exca/exca.c#4 integrate .. //depot/projects/usb/src/sys/dev/fxp/if_fxp.c#7 integrate .. //depot/projects/usb/src/sys/dev/if_ndis/if_ndis.c#14 integrate .. //depot/projects/usb/src/sys/dev/iicbus/ad7418.c#4 integrate .. //depot/projects/usb/src/sys/dev/iicbus/ds1672.c#3 integrate .. //depot/projects/usb/src/sys/dev/iicbus/icee.c#3 integrate .. //depot/projects/usb/src/sys/dev/iicbus/if_ic.c#4 integrate .. //depot/projects/usb/src/sys/dev/iicbus/iic.c#6 integrate .. //depot/projects/usb/src/sys/dev/iicbus/iicbus.c#6 integrate .. //depot/projects/usb/src/sys/dev/iicbus/iicsmb.c#5 integrate .. //depot/projects/usb/src/sys/dev/mge/if_mge.c#2 integrate .. //depot/projects/usb/src/sys/dev/mge/if_mgevar.h#2 integrate .. //depot/projects/usb/src/sys/dev/mpt/mpt.c#8 integrate .. //depot/projects/usb/src/sys/dev/mpt/mpt.h#9 integrate .. //depot/projects/usb/src/sys/dev/mpt/mpt_cam.c#9 integrate .. //depot/projects/usb/src/sys/dev/mpt/mpt_raid.c#8 integrate .. //depot/projects/usb/src/sys/dev/mpt/mpt_user.c#3 integrate .. //depot/projects/usb/src/sys/dev/ofw/ofw_bus_subr.c#3 integrate .. //depot/projects/usb/src/sys/dev/ofw/openfirm.c#5 integrate .. //depot/projects/usb/src/sys/dev/ofw/openfirm.h#5 integrate .. //depot/projects/usb/src/sys/dev/pccard/pccardvar.h#3 integrate .. //depot/projects/usb/src/sys/dev/pcn/if_pcn.c#2 integrate .. //depot/projects/usb/src/sys/dev/sound/pci/au88x0.c#4 delete .. //depot/projects/usb/src/sys/dev/sound/pci/au88x0.h#2 delete .. //depot/projects/usb/src/sys/dev/sound/pci/hda/hdac.c#17 integrate .. //depot/projects/usb/src/sys/dev/sound/pcm/sound.c#8 integrate .. //depot/projects/usb/src/sys/dev/syscons/teken/teken.c#2 integrate .. //depot/projects/usb/src/sys/dev/syscons/teken/teken.h#2 integrate .. //depot/projects/usb/src/sys/dev/syscons/teken/teken_demo.c#2 integrate .. //depot/projects/usb/src/sys/dev/syscons/teken/teken_subr.h#2 integrate .. //depot/projects/usb/src/sys/dev/uart/uart_cpu_mv.c#2 integrate .. //depot/projects/usb/src/sys/dev/usb/ehci_mbus.c#3 integrate .. //depot/projects/usb/src/sys/dev/usb/ehci_pci.c#41 integrate .. //depot/projects/usb/src/sys/dev/usb/uhci_pci.c#36 integrate .. //depot/projects/usb/src/sys/dev/usb/usbdevs#36 integrate .. //depot/projects/usb/src/sys/dev/usb2/controller/ehci2_pci.c#20 edit .. //depot/projects/usb/src/sys/dev/usb2/controller/uhci2_pci.c#18 edit .. //depot/projects/usb/src/sys/dev/usb2/include/usb2_devid.h#22 edit .. //depot/projects/usb/src/sys/dev/usb2/include/usb2_devtable.h#22 edit .. //depot/projects/usb/src/sys/dev/usb2/serial/ufoma2.c#16 integrate .. //depot/projects/usb/src/sys/dev/usb2/serial/usb2_serial.c#20 integrate .. //depot/projects/usb/src/sys/fs/devfs/devfs_vnops.c#14 integrate .. //depot/projects/usb/src/sys/fs/pseudofs/pseudofs_vncache.c#7 integrate .. //depot/projects/usb/src/sys/geom/part/g_part.c#12 integrate .. //depot/projects/usb/src/sys/geom/part/g_part_pc98.c#6 integrate .. //depot/projects/usb/src/sys/geom/part/g_part_vtoc8.c#5 integrate .. //depot/projects/usb/src/sys/gnu/fs/ext2fs/ext2_bitops.h#2 integrate .. //depot/projects/usb/src/sys/i386/conf/GENERIC#18 integrate .. //depot/projects/usb/src/sys/i386/cpufreq/est.c#6 integrate .. //depot/projects/usb/src/sys/kern/kern_jail.c#13 integrate .. //depot/projects/usb/src/sys/kern/tty.c#14 integrate .. //depot/projects/usb/src/sys/kern/uipc_cow.c#3 integrate .. //depot/projects/usb/src/sys/kern/uipc_debug.c#5 integrate .. //depot/projects/usb/src/sys/kern/uipc_domain.c#8 integrate .. //depot/projects/usb/src/sys/kern/vfs_extattr.c#4 integrate .. //depot/projects/usb/src/sys/modules/iwnfw/Makefile#2 integrate .. //depot/projects/usb/src/sys/modules/sound/driver/au88x0/Makefile#2 delete .. //depot/projects/usb/src/sys/net/route.c#14 integrate .. //depot/projects/usb/src/sys/net/rtsock.c#14 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211.c#12 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211.h#10 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_adhoc.c#4 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_ddb.c#7 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_freebsd.c#11 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_input.c#12 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_input.h#2 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_ioctl.c#13 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_ioctl.h#8 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_node.c#14 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_node.h#10 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_output.c#15 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_proto.h#9 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_scan.h#3 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_scan_sta.c#7 integrate .. //depot/projects/usb/src/sys/net80211/ieee80211_tdma.c#1 branch .. //depot/projects/usb/src/sys/net80211/ieee80211_tdma.h#1 branch .. //depot/projects/usb/src/sys/net80211/ieee80211_var.h#13 integrate .. //depot/projects/usb/src/sys/netgraph/ng_vjc.c#3 integrate .. //depot/projects/usb/src/sys/netinet/in.c#15 integrate .. //depot/projects/usb/src/sys/netinet/in.h#8 integrate .. //depot/projects/usb/src/sys/netinet/in_pcb.c#16 integrate .. //depot/projects/usb/src/sys/netinet/in_pcb.h#14 integrate .. //depot/projects/usb/src/sys/netinet/ip_output.c#12 integrate .. //depot/projects/usb/src/sys/netinet/udp_usrreq.c#16 integrate .. //depot/projects/usb/src/sys/netinet/udp_var.h#5 integrate .. //depot/projects/usb/src/sys/netinet6/in6.c#13 integrate .. //depot/projects/usb/src/sys/netinet6/in6_gif.c#9 integrate .. //depot/projects/usb/src/sys/netinet6/ip6protosw.h#3 integrate .. //depot/projects/usb/src/sys/netinet6/udp6_usrreq.c#15 integrate .. //depot/projects/usb/src/sys/netipsec/xform_ipip.c#10 integrate .. //depot/projects/usb/src/sys/powerpc/powermac/grackle.c#7 integrate .. //depot/projects/usb/src/sys/powerpc/powermac/gracklevar.h#3 integrate .. //depot/projects/usb/src/sys/powerpc/powermac/macio.c#7 integrate .. //depot/projects/usb/src/sys/powerpc/powermac/uninorth.c#8 integrate .. //depot/projects/usb/src/sys/powerpc/powermac/uninorthvar.h#4 integrate .. //depot/projects/usb/src/sys/security/audit/audit.h#9 integrate .. //depot/projects/usb/src/sys/security/audit/audit_pipe.c#11 integrate .. //depot/projects/usb/src/sys/security/mac/mac_framework.c#3 integrate .. //depot/projects/usb/src/sys/security/mac/mac_inet6.c#3 integrate .. //depot/projects/usb/src/sys/security/mac/mac_internal.h#7 integrate .. //depot/projects/usb/src/sys/security/mac/mac_policy.h#9 integrate .. //depot/projects/usb/src/sys/security/mac_biba/mac_biba.c#10 integrate .. //depot/projects/usb/src/sys/security/mac_bsdextended/mac_bsdextended.c#11 integrate .. //depot/projects/usb/src/sys/security/mac_ifoff/mac_ifoff.c#6 integrate .. //depot/projects/usb/src/sys/security/mac_lomac/mac_lomac.c#11 integrate .. //depot/projects/usb/src/sys/security/mac_mls/mac_mls.c#11 integrate .. //depot/projects/usb/src/sys/security/mac_none/mac_none.c#6 integrate .. //depot/projects/usb/src/sys/security/mac_partition/mac_partition.c#8 integrate .. //depot/projects/usb/src/sys/security/mac_portacl/mac_portacl.c#8 integrate .. //depot/projects/usb/src/sys/security/mac_seeotheruids/mac_seeotheruids.c#8 integrate .. //depot/projects/usb/src/sys/security/mac_stub/mac_stub.c#10 integrate .. //depot/projects/usb/src/sys/security/mac_test/mac_test.c#10 integrate .. //depot/projects/usb/src/sys/sys/elf_common.h#9 integrate .. //depot/projects/usb/src/sys/sys/mbuf.h#10 integrate .. //depot/projects/usb/src/sys/sys/protosw.h#5 integrate .. //depot/projects/usb/src/sys/sys/soundcard.h#3 integrate .. //depot/projects/usb/src/sys/ufs/ffs/ffs_vfsops.c#13 integrate .. //depot/projects/usb/src/sys/ufs/ufs/ufs_extattr.c#7 integrate .. //depot/projects/usb/src/sys/vm/vm_page.c#13 integrate .. //depot/projects/usb/src/sys/vm/vm_page.h#10 integrate Differences ... ==== //depot/projects/usb/src/sys/amd64/amd64/identcpu.c#11 (text+ko) ==== @@ -39,7 +39,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.168 2008/12/12 23:17:00 jkim Exp $"); +__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.169 2009/01/05 21:51:49 jkim Exp $"); #include "opt_cpu.h" @@ -102,6 +102,7 @@ } cpu_vendors[] = { { INTEL_VENDOR_ID, CPU_VENDOR_INTEL }, /* GenuineIntel */ { AMD_VENDOR_ID, CPU_VENDOR_AMD }, /* AuthenticAMD */ + { CENTAUR_VENDOR_ID, CPU_VENDOR_CENTAUR }, /* CentaurHauls */ }; int cpu_cores; ==== //depot/projects/usb/src/sys/amd64/conf/GENERIC#18 (text+ko) ==== @@ -16,7 +16,7 @@ # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # -# $FreeBSD: src/sys/amd64/conf/GENERIC,v 1.511 2008/12/02 19:09:08 ed Exp $ +# $FreeBSD: src/sys/amd64/conf/GENERIC,v 1.512 2009/01/05 14:21:49 rwatson Exp $ cpu HAMMER ident GENERIC @@ -65,6 +65,8 @@ options STOP_NMI # Stop CPUS using NMI instead of IPI options AUDIT # Security event auditing options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) +#options KDTRACE_FRAME # Ensure frames are compiled in +#options KDTRACE_HOOKS # Kernel DTrace hooks # Debugging for use in -current options KDB # Enable kernel debugger support. ==== //depot/projects/usb/src/sys/amd64/include/cputypes.h#3 (text+ko) ==== @@ -24,7 +24,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/amd64/include/cputypes.h,v 1.20 2008/11/26 19:25:13 jkim Exp $ + * $FreeBSD: src/sys/amd64/include/cputypes.h,v 1.21 2009/01/05 21:51:49 jkim Exp $ */ #ifndef _MACHINE_CPUTYPES_H_ @@ -47,7 +47,9 @@ * Vendors of processor. */ #define CPU_VENDOR_AMD 0x1022 /* AMD */ +#define CPU_VENDOR_IDT 0x111d /* Centaur/IDT/VIA */ #define CPU_VENDOR_INTEL 0x8086 /* Intel */ +#define CPU_VENDOR_CENTAUR CPU_VENDOR_IDT #ifndef LOCORE extern int cpu; ==== //depot/projects/usb/src/sys/amd64/include/specialreg.h#11 (text+ko) ==== @@ -27,7 +27,7 @@ * SUCH DAMAGE. * * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 - * $FreeBSD: src/sys/amd64/include/specialreg.h,v 1.51 2008/12/12 23:17:00 jkim Exp $ + * $FreeBSD: src/sys/amd64/include/specialreg.h,v 1.52 2009/01/05 21:51:49 jkim Exp $ */ #ifndef _MACHINE_SPECIALREG_H_ @@ -205,6 +205,7 @@ * CPUID manufacturers identifiers */ #define AMD_VENDOR_ID "AuthenticAMD" +#define CENTAUR_VENDOR_ID "CentaurHauls" #define INTEL_VENDOR_ID "GenuineIntel" /* ==== //depot/projects/usb/src/sys/arm/arm/cpufunc.c#8 (text+ko) ==== @@ -45,7 +45,7 @@ * Created : 30/01/97 */ #include -__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.24 2008/12/20 03:26:09 sam Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.25 2009/01/09 10:45:04 raj Exp $"); #include #include @@ -358,7 +358,7 @@ }; -struct cpu_functions feroceon_cpufuncs = { +struct cpu_functions sheeva_cpufuncs = { /* CPU functions */ cpufunc_id, /* id */ @@ -368,7 +368,7 @@ cpufunc_control, /* control */ cpufunc_domains, /* Domain */ - feroceon_setttb, /* Setttb */ + sheeva_setttb, /* Setttb */ cpufunc_faultstatus, /* Faultstatus */ cpufunc_faultaddress, /* Faultaddress */ @@ -387,17 +387,17 @@ armv5_ec_icache_sync_range, /* icache_sync_range */ armv5_ec_dcache_wbinv_all, /* dcache_wbinv_all */ - feroceon_dcache_wbinv_range, /* dcache_wbinv_range */ - feroceon_dcache_inv_range, /* dcache_inv_range */ - feroceon_dcache_wb_range, /* dcache_wb_range */ + sheeva_dcache_wbinv_range, /* dcache_wbinv_range */ + sheeva_dcache_inv_range, /* dcache_inv_range */ + sheeva_dcache_wb_range, /* dcache_wb_range */ armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all */ - feroceon_idcache_wbinv_range, /* idcache_wbinv_all */ + sheeva_idcache_wbinv_range, /* idcache_wbinv_all */ - feroceon_l2cache_wbinv_all, /* l2cache_wbinv_all */ - feroceon_l2cache_wbinv_range, /* l2cache_wbinv_range */ - feroceon_l2cache_inv_range, /* l2cache_inv_range */ - feroceon_l2cache_wb_range, /* l2cache_wb_range */ + sheeva_l2cache_wbinv_all, /* l2cache_wbinv_all */ + sheeva_l2cache_wbinv_range, /* l2cache_wbinv_range */ + sheeva_l2cache_inv_range, /* l2cache_inv_range */ + sheeva_l2cache_wb_range, /* l2cache_wb_range */ /* Other functions */ @@ -1000,7 +1000,7 @@ cputype == CPU_ID_MV88FR571_VD || cputype == CPU_ID_MV88FR571_41) { - cpufuncs = feroceon_cpufuncs; + cpufuncs = sheeva_cpufuncs; /* * Workaround for Marvell MV78100 CPU: Cache prefetch * mechanism may affect the cache coherency validity, @@ -1011,12 +1011,12 @@ */ if (cputype == CPU_ID_MV88FR571_VD || cputype == CPU_ID_MV88FR571_41) { - feroceon_control_ext(0xffffffff, + sheeva_control_ext(0xffffffff, FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN | FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN | FC_L2_PREF_DIS); } else { - feroceon_control_ext(0xffffffff, + sheeva_control_ext(0xffffffff, FC_DCACHE_STREAM_EN | FC_WR_ALLOC_EN | FC_BRANCH_TARG_BUF_DIS | FC_L2CACHE_EN); } ==== //depot/projects/usb/src/sys/arm/arm/elf_trampoline.c#9 (text+ko) ==== @@ -23,7 +23,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.22 2008/10/13 20:07:13 raj Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.23 2009/01/09 10:45:04 raj Exp $"); #include #include #include @@ -74,7 +74,7 @@ #ifdef CPU_XSCALE_81342 #define cpu_l2cache_wbinv_all xscalec3_l2cache_purge #elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) -#define cpu_l2cache_wbinv_all feroceon_l2cache_wbinv_all +#define cpu_l2cache_wbinv_all sheeva_l2cache_wbinv_all #else #define cpu_l2cache_wbinv_all() #endif ==== //depot/projects/usb/src/sys/arm/include/cpufunc.h#7 (text+ko) ==== @@ -38,7 +38,7 @@ * * Prototypes for cpu, mmu and tlb related functions. * - * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.14 2008/10/13 18:16:54 raj Exp $ + * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.15 2009/01/09 10:45:04 raj Exp $ */ #ifndef _MACHINE_CPUFUNC_H_ @@ -377,17 +377,17 @@ extern unsigned arm10_dcache_index_max; extern unsigned arm10_dcache_index_inc; -u_int feroceon_control_ext (u_int, u_int); -void feroceon_setttb (u_int); -void feroceon_dcache_wbinv_range (vm_offset_t, vm_size_t); -void feroceon_dcache_inv_range (vm_offset_t, vm_size_t); -void feroceon_dcache_wb_range (vm_offset_t, vm_size_t); -void feroceon_idcache_wbinv_range (vm_offset_t, vm_size_t); +u_int sheeva_control_ext (u_int, u_int); +void sheeva_setttb (u_int); +void sheeva_dcache_wbinv_range (vm_offset_t, vm_size_t); +void sheeva_dcache_inv_range (vm_offset_t, vm_size_t); +void sheeva_dcache_wb_range (vm_offset_t, vm_size_t); +void sheeva_idcache_wbinv_range (vm_offset_t, vm_size_t); -void feroceon_l2cache_wbinv_range (vm_offset_t, vm_size_t); -void feroceon_l2cache_inv_range (vm_offset_t, vm_size_t); -void feroceon_l2cache_wb_range (vm_offset_t, vm_size_t); -void feroceon_l2cache_wbinv_all (void); +void sheeva_l2cache_wbinv_range (vm_offset_t, vm_size_t); +void sheeva_l2cache_inv_range (vm_offset_t, vm_size_t); +void sheeva_l2cache_wb_range (vm_offset_t, vm_size_t); +void sheeva_l2cache_wbinv_all (void); #endif #ifdef CPU_ARM11 ==== //depot/projects/usb/src/sys/arm/mv/common.c#3 (text+ko) ==== @@ -30,7 +30,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/arm/mv/common.c,v 1.3 2008/11/19 11:57:16 raj Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/mv/common.c,v 1.5 2009/01/08 18:31:43 raj Exp $"); #include #include @@ -46,13 +46,19 @@ static int decode_win_usb_valid(void); static int decode_win_eth_valid(void); static int decode_win_pcie_valid(void); +static int decode_win_sata_valid(void); +static int decode_win_cesa_valid(void); static void decode_win_cpu_setup(void); -static void decode_win_usb_setup(uint32_t ctrl); +static void decode_win_usb_setup(void); static void decode_win_eth_setup(uint32_t base); static void decode_win_pcie_setup(uint32_t base); +static void decode_win_sata_setup(void); +static void decode_win_cesa_setup(void); + +static void decode_win_cesa_dump(void); +static void decode_win_usb_dump(void); -static uint32_t dev, rev; static uint32_t used_cpu_wins; uint32_t @@ -81,6 +87,7 @@ uint32_t cpu_extra_feat(void) { + uint32_t dev, rev; uint32_t ef = 0; soc_id(&dev, &rev); @@ -104,17 +111,6 @@ return (mask); } -uint32_t -get_tclk(void) -{ - -#if defined(SOC_MV_DISCOVERY) - return (TCLK_200MHZ); -#else - return (TCLK_166MHZ); -#endif -} - void soc_id(uint32_t *dev, uint32_t *rev) { @@ -165,6 +161,10 @@ break; case MV_DEV_88F6281: dev = "Marvell 88F6281"; + if (r == 0) + rev = "Z0"; + else if (r == 2) + rev = "A0"; break; case MV_DEV_MV78100: dev = "Marvell MV78100"; @@ -185,22 +185,27 @@ int soc_decode_win(void) { + uint32_t dev, rev; /* Retrieve our ID: some windows facilities vary between SoC models */ soc_id(&dev, &rev); if (decode_win_cpu_valid() != 1 || decode_win_usb_valid() != 1 || decode_win_eth_valid() != 1 || decode_win_idma_valid() != 1 || - decode_win_pcie_valid() != 1) + decode_win_pcie_valid() != 1 || decode_win_sata_valid() != 1 || + decode_win_cesa_valid() != 1) return(-1); decode_win_cpu_setup(); - decode_win_usb_setup(MV_USB0_BASE); + decode_win_usb_setup(); decode_win_eth_setup(MV_ETH0_BASE); if (dev == MV_DEV_MV78100) decode_win_eth_setup(MV_ETH1_BASE); + if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100) + decode_win_cesa_setup(); decode_win_idma_setup(); + decode_win_xor_setup(); if (dev == MV_DEV_MV78100) { decode_win_pcie_setup(MV_PCIE00_BASE); @@ -214,7 +219,8 @@ } else decode_win_pcie_setup(MV_PCIE_BASE); - /* TODO set up decode wins for SATA */ + if (dev != MV_DEV_88F5281) + decode_win_sata_setup(); return (0); } @@ -234,10 +240,15 @@ WIN_REG_IDX_RD(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE) WIN_REG_IDX_RD(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE) -WIN_REG_IDX_RD(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE) -WIN_REG_IDX_RD(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE) -WIN_REG_IDX_WR(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE) -WIN_REG_IDX_WR(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE) +WIN_REG_IDX_RD2(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE) +WIN_REG_IDX_RD2(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE) +WIN_REG_IDX_WR2(win_usb, cr, MV_WIN_USB_CTRL, MV_USB_AWR_BASE) +WIN_REG_IDX_WR2(win_usb, br, MV_WIN_USB_BASE, MV_USB_AWR_BASE) + +WIN_REG_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL, MV_CESA_BASE) +WIN_REG_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE, MV_CESA_BASE) +WIN_REG_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL, MV_CESA_BASE) +WIN_REG_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE, MV_CESA_BASE) WIN_REG_BASE_IDX_RD(win_eth, br, MV_WIN_ETH_BASE) WIN_REG_BASE_IDX_RD(win_eth, sz, MV_WIN_ETH_SIZE) @@ -245,6 +256,16 @@ WIN_REG_BASE_IDX_WR(win_eth, br, MV_WIN_ETH_BASE) WIN_REG_BASE_IDX_WR(win_eth, sz, MV_WIN_ETH_SIZE) WIN_REG_BASE_IDX_WR(win_eth, har, MV_WIN_ETH_REMAP) + +WIN_REG_IDX_RD2(win_xor, br, MV_WIN_XOR_BASE, MV_XOR_BASE) +WIN_REG_IDX_RD2(win_xor, sz, MV_WIN_XOR_SIZE, MV_XOR_BASE) +WIN_REG_IDX_RD2(win_xor, har, MV_WIN_XOR_REMAP, MV_XOR_BASE) +WIN_REG_IDX_RD2(win_xor, ctrl, MV_WIN_XOR_CTRL, MV_XOR_BASE) +WIN_REG_IDX_WR2(win_xor, br, MV_WIN_XOR_BASE, MV_XOR_BASE) +WIN_REG_IDX_WR2(win_xor, sz, MV_WIN_XOR_SIZE, MV_XOR_BASE) +WIN_REG_IDX_WR2(win_xor, har, MV_WIN_XOR_REMAP, MV_XOR_BASE) +WIN_REG_IDX_WR2(win_xor, ctrl, MV_WIN_XOR_CTRL, MV_XOR_BASE) + WIN_REG_BASE_RD(win_eth, bare, 0x290) WIN_REG_BASE_RD(win_eth, epap, 0x294) WIN_REG_BASE_WR(win_eth, bare, 0x290) @@ -269,12 +290,18 @@ WIN_REG_RD(win_idma, bare, 0xa80, MV_IDMA_BASE) WIN_REG_WR(win_idma, bare, 0xa80, MV_IDMA_BASE) +WIN_REG_IDX_RD(win_sata, cr, MV_WIN_SATA_CTRL, MV_SATAHC_BASE); +WIN_REG_IDX_RD(win_sata, br, MV_WIN_SATA_BASE, MV_SATAHC_BASE); +WIN_REG_IDX_WR(win_sata, cr, MV_WIN_SATA_CTRL, MV_SATAHC_BASE); +WIN_REG_IDX_WR(win_sata, br, MV_WIN_SATA_BASE, MV_SATAHC_BASE); + /************************************************************************** * Decode windows helper routines **************************************************************************/ void soc_dump_decode_win(void) { + uint32_t dev, rev; int i; soc_id(&dev, &rev); @@ -297,10 +324,6 @@ for (i = 0; i < MV_WIN_DDR_MAX; i++) printf("DDR CS#%d: b 0x%08x, s 0x%08x\n", i, ddr_br_read(i), ddr_sz_read(i)); - - for (i = 0; i < MV_WIN_USB_MAX; i++) - printf("USB window#%d: c 0x%08x, b 0x%08x\n", i, - win_usb_cr_read(i), win_usb_br_read(i)); for (i = 0; i < MV_WIN_ETH_MAX; i++) { printf("ETH window#%d: b 0x%08x, s 0x%08x", i, @@ -318,6 +341,8 @@ win_eth_epap_read(MV_ETH0_BASE)); decode_win_idma_dump(); + decode_win_cesa_dump(); + decode_win_usb_dump(); printf("\n"); } @@ -327,7 +352,10 @@ int win_cpu_can_remap(int i) { + uint32_t dev, rev; + soc_id(&dev, &rev); + /* Depending on the SoC certain windows have remap capability */ if ((dev == MV_DEV_88F5182 && i < 2) || (dev == MV_DEV_88F5281 && i < 4) || @@ -556,42 +584,69 @@ return (decode_win_can_cover_ddr(MV_WIN_USB_MAX)); } +static __inline int +usb_max_ports(void) +{ + uint32_t dev, rev; + + soc_id(&dev, &rev); + return (dev == MV_DEV_MV78100 ? 3 : 1); +} + +static void +decode_win_usb_dump(void) +{ + int i, p, m; + + m = usb_max_ports(); + for (p = 0; p < m; p++) + for (i = 0; i < MV_WIN_USB_MAX; i++) + printf("USB window#%d: c 0x%08x, b 0x%08x\n", i, + win_usb_cr_read(i, p), win_usb_br_read(i, p)); +} + /* * Set USB decode windows. */ static void -decode_win_usb_setup(uint32_t ctrl) +decode_win_usb_setup(void) { uint32_t br, cr; - int i, j; + int i, j, p, m; + + /* Disable and clear all USB windows for all ports */ + m = usb_max_ports(); + for (p = 0; p < m; p++) { - /* Disable and clear all USB windows */ - for (i = 0; i < MV_WIN_USB_MAX; i++) { - win_usb_cr_write(i, 0); - win_usb_br_write(i, 0); - } + for (i = 0; i < MV_WIN_USB_MAX; i++) { + win_usb_cr_write(i, p, 0); + win_usb_br_write(i, p, 0); + } - /* Only access to active DRAM banks is required */ - for (i = 0; i < MV_WIN_DDR_MAX; i++) - if (ddr_is_active(i)) { - br = ddr_base(i); - /* - * XXX for 6281 we should handle Mbus write burst limit - * field in the ctrl reg - */ - cr = (((ddr_size(i) - 1) & 0xffff0000) | - (ddr_attr(i) << 8) | (ddr_target(i) << 4) | 1); + /* Only access to active DRAM banks is required */ + for (i = 0; i < MV_WIN_DDR_MAX; i++) { + if (ddr_is_active(i)) { + br = ddr_base(i); + /* + * XXX for 6281 we should handle Mbus write + * burst limit field in the ctrl reg + */ + cr = (((ddr_size(i) - 1) & 0xffff0000) | + (ddr_attr(i) << 8) | + (ddr_target(i) << 4) | 1); - /* Set the first free USB window */ - for (j = 0; j < MV_WIN_USB_MAX; j++) { - if (win_usb_cr_read(j) & 0x1) - continue; + /* Set the first free USB window */ + for (j = 0; j < MV_WIN_USB_MAX; j++) { + if (win_usb_cr_read(j, p) & 0x1) + continue; - win_usb_br_write(j, br); - win_usb_cr_write(j, cr); - break; + win_usb_br_write(j, p, br); + win_usb_cr_write(j, p, cr); + break; + } } } + } } /************************************************************************** @@ -941,7 +996,7 @@ j = decode_win_overlap(i, idma_wins_no, &idma_wins[0]); if (j >= 0) { printf("IDMA window#%d: (0x%08x - 0x%08x) overlaps " - "with " "#%d (0x%08x - 0x%08x)\n", i, b, e, j, + "with #%d (0x%08x - 0x%08x)\n", i, b, e, j, idma_wins[j].base, idma_wins[j].base + idma_wins[j].size - 1); rv = 0; @@ -990,3 +1045,413 @@ { } #endif + +/************************************************************************** + * XOR windows routines + **************************************************************************/ +#if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) +static int +xor_ctrl_read(int i, int c, int e) +{ + uint32_t v; + v = win_xor_ctrl_read(c, e); + v &= (1 << i); + + return (v >> i); +} + +static void +xor_ctrl_write(int i, int c, int e, int val) +{ + uint32_t v; + + v = win_xor_ctrl_read(c, e); + v &= ~(1 << i); + v |= (val << i); + win_xor_ctrl_write(c, e, v); +} + +/* + * Set channel protection 'val' for window 'w' on channel 'c' + */ + +static void +xor_chan_write(int c, int e, int w, int val) +{ + uint32_t v; + + v = win_xor_ctrl_read(c, e); + v &= ~(0x3 << (w * 2 + 16)); + v |= (val << (w * 2 + 16)); + win_xor_ctrl_write(c, e, v); +} + +/* + * Set protection 'val' on all channels for window 'w' on engine 'e' + */ +static void +xor_set_prot(int w, int e, int val) +{ + int c; + + for (c = 0; c < MV_XOR_CHAN_MAX; c++) + xor_chan_write(c, e, w, val); +} + +static int +win_xor_can_remap(int i) +{ + + /* XOR decode windows 0-3 have remap capability */ + if (i < 4) + return (1); + + return (0); +} + +static __inline int +xor_max_eng(void) +{ + uint32_t dev, rev; + + soc_id(&dev, &rev); + return ((dev == MV_DEV_88F6281) ? 2 : + (dev == MV_DEV_MV78100) ? 1 : 0); +} + +static void +xor_active_dram(int c, int e, int *window) +{ + uint32_t br, sz; + int i, m, w; + + /* + * Set up access to all active DRAM banks + */ + m = xor_max_eng(); + for (i = 0; i < m; i++) + if (ddr_is_active(i)) { + br = ddr_base(i) | (ddr_attr(i) << 8) | + ddr_target(i); + sz = ((ddr_size(i) - 1) & 0xffff0000); + + /* Place DDR entries in non-remapped windows */ + for (w = 0; w < MV_WIN_XOR_MAX; w++) + if (win_xor_can_remap(w) != 1 && + (xor_ctrl_read(w, c, e) == 0) && + w > *window) { + /* Configure window */ + win_xor_br_write(w, e, br); + win_xor_sz_write(w, e, sz); + + /* Set protection RW on all channels */ + xor_set_prot(w, e, 0x3); + + /* Enable window */ + xor_ctrl_write(w, c, e, 1); + (*window)++; + break; + } + } +} + +void +decode_win_xor_setup(void) +{ + uint32_t br, sz; + int i, j, z, e = 1, m, window; + + /* + * Disable and clear all XOR windows, revoke protection for all + * channels + */ + m = xor_max_eng(); + for (j = 0; j < m; j++, e--) { + + /* Number of non-remaped windows */ + window = MV_XOR_NON_REMAP - 1; + + for (i = 0; i < MV_WIN_XOR_MAX; i++) { + win_xor_br_write(i, e, 0); + win_xor_sz_write(i, e, 0); + } + + if (win_xor_can_remap(i) == 1) + win_xor_har_write(i, e, 0); + + for (i = 0; i < MV_XOR_CHAN_MAX; i++) { + win_xor_ctrl_write(i, e, 0); + xor_active_dram(i, e, &window); + } + + /* + * Remaining targets -- from a statically defined table + */ + for (i = 0; i < xor_wins_no; i++) + if (xor_wins[i].target > 0) { + br = (xor_wins[i].base & 0xffff0000) | + (xor_wins[i].attr << 8) | + xor_wins[i].target; + sz = ((xor_wins[i].size - 1) & 0xffff0000); + + /* Set the first free XOR window */ + for (z = 0; z < MV_WIN_XOR_MAX; z++) { + if (xor_ctrl_read(z, 0, e) && + xor_ctrl_read(z, 1, e)) + continue; + + /* Configure window */ + win_xor_br_write(z, e, br); + win_xor_sz_write(z, e, sz); + if (win_xor_can_remap(z) && + xor_wins[z].remap >= 0) + win_xor_har_write(z, e, + xor_wins[z].remap); + + /* Set protection RW on all channels */ + xor_set_prot(z, e, 0x3); + + /* Enable window */ + xor_ctrl_write(z, 0, e, 1); + xor_ctrl_write(z, 1, e, 1); + break; + } + } + } +} + +int +decode_win_xor_valid(void) +{ + const struct decode_win *wintab; + int c, i, j, rv; + uint32_t b, e, s; + + if (xor_wins_no > MV_WIN_XOR_MAX) { + printf("XOR windows: too many entries: %d\n", xor_wins_no); + return (-1); + } + for (i = 0, c = 0; i < MV_WIN_DDR_MAX; i++) + if (ddr_is_active(i)) + c++; + + if (xor_wins_no > (MV_WIN_XOR_MAX - c)) { + printf("XOR windows: too many entries: %d, available: %d\n", + xor_wins_no, MV_WIN_IDMA_MAX - c); + return (-1); + } + + wintab = xor_wins; + rv = 1; + for (i = 0; i < xor_wins_no; i++, wintab++) { + + if (wintab->target == 0) { + printf("XOR window#%d: DDR target window is not " + "supposed to be reprogrammed!\n", i); + rv = 0; + } + + if (wintab->remap >= 0 && win_cpu_can_remap(i) != 1) { + printf("XOR window#%d: not capable of remapping, but " + "val 0x%08x defined\n", i, wintab->remap); + rv = 0; + } + + s = wintab->size; + b = wintab->base; + e = b + s - 1; + if (s > (0xFFFFFFFF - b + 1)) { + /* + * XXX this boundary check should account for 64bit + * and remapping.. + */ + printf("XOR window#%d: no space for size 0x%08x at " + "0x%08x\n", i, s, b); + rv = 0; + continue; + } + + j = decode_win_overlap(i, xor_wins_no, &xor_wins[0]); + if (j >= 0) { + printf("XOR window#%d: (0x%08x - 0x%08x) overlaps " + "with #%d (0x%08x - 0x%08x)\n", i, b, e, j, + xor_wins[j].base, + xor_wins[j].base + xor_wins[j].size - 1); + rv = 0; + } + } + + return (rv); +} + +void +decode_win_xor_dump(void) +{ + int i, j; + int e = 1; + + for (j = 0; j < xor_max_eng(); j++, e--) { + for (i = 0; i < MV_WIN_XOR_MAX; i++) { + printf("XOR window#%d: b 0x%08x, s 0x%08x", i, + win_xor_br_read(i, e), win_xor_sz_read(i, e)); + + if (win_xor_can_remap(i)) + printf(", ha 0x%08x", win_xor_har_read(i, e)); + + printf("\n"); + } + for (i = 0; i < MV_XOR_CHAN_MAX; i++) + printf("XOR control#%d: 0x%08x\n", i, + win_xor_ctrl_read(i, e)); + } +} + +#else +/* Provide dummy functions to satisfy the build for SoCs not equipped with XOR */ +int +decode_win_xor_valid(void) +{ + + return (1); +} + +void +decode_win_xor_setup(void) +{ +} + +void +decode_win_xor_dump(void) +{ +} +#endif + +/************************************************************************** + * CESA TDMA windows routines + **************************************************************************/ +#if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) +/* + * Dump CESA TDMA decode windows. + */ +static void +decode_win_cesa_dump(void) +{ + int i; + + for (i = 0; i < MV_WIN_CESA_MAX; i++) + printf("CESA window#%d: c 0x%08x, b 0x%08x\n", i, + win_cesa_cr_read(i), win_cesa_br_read(i)); +} >>> TRUNCATED FOR MAIL (1000 lines) <<<