From owner-freebsd-mobile Thu Dec 18 15:28:28 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id PAA02487 for mobile-outgoing; Thu, 18 Dec 1997 15:28:28 -0800 (PST) (envelope-from owner-freebsd-mobile) Received: from tnt.isi.edu (tnt.isi.edu [128.9.128.128]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id PAA02477 for ; Thu, 18 Dec 1997 15:28:23 -0800 (PST) (envelope-from faber@ISI.EDU) Received: from ISI.EDU (vex-s.isi.edu [128.9.192.240]) by tnt.isi.edu (8.8.7/8.8.6) with ESMTP id PAA23547; Thu, 18 Dec 1997 15:28:14 -0800 (PST) Message-Id: <199712182328.PAA23547@tnt.isi.edu> To: ambrisko@whistle.com, nate@mt.sri.com cc: freebsd-mobile@FreeBSD.ORG X-Url: http://www.isi.edu/~faber Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Thu, 18 Dec 1997 15:28:14 -0800 From: Ted Faber Sender: owner-freebsd-mobile@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Hi, guys. Nate, here's a patch to -current that addresses the issue Doug raised of CL-PD6832's that are initialized to odd ports and also allows users to specify a port for their pcic other than the bios default port. Right now, this added flexibility isn't worth much, because /sys/pccard/pcic.c has its ports essentially hardwired at 0x3e0, but it seems cleaner to me anyway. It should provide a way for users with chips initialized to standard CArdBus operation to switch to 16-bit legacy mode. Doug and I (mostly Doug, since I don't see the same problems in my setup) are still poking around with his interrupts so there may be some more fixes to come, but this seems solid (and works fine on my box with PCIC_PCI_PORT defined or not (defining it to other than 0x3e0 boots, but the pcic driver doesn't find the chip). Do we need to add PCIC_PCI_PORT to the LINT config and document it? *** pcic_p.c.orig Thu Dec 18 15:07:59 1997 --- pcic_p.c Thu Dec 18 15:10:40 1997 *************** *** 135,140 **** --- 135,149 ---- u_long bcr; /* to set interrupts */ u_short io_port; /* the io_port to map this slot on */ + #ifdef PCIC_PCI_PORT + /* + * This allows builders to assign the I/O port to the legacy + * mode interface explicitly + */ + io_port = PCIC_PCI_PORT; + pci_conf_write(tag, CLPD6832_LEGACY_16BIT_IOADDR, + io_port & ~PCI_MAP_IO); + #endif /* * I think this should be a call to pci_map_port, but that * routine won't map regiaters above 0x28, and the register we