Date: Mon, 26 Jun 2000 15:09:10 -0400 (EDT) From: Andrew Gallatin <gallatin@cs.duke.edu> To: adsharma@sharmas.dhs.org Cc: freebsd-hackers@freebsd.org Subject: Re: VM coloring description in NOTES Message-ID: <14679.40851.766762.577274@grasshopper.cs.duke.edu> In-Reply-To: <slrn8lf206.73g.adsharma@c62443-a.frmt1.sfba.home.com> References: <59063B5B4D98D311BC0D0001FA7E4522026D76AF@l04.research.kpn.com> <slrn8lf206.73g.adsharma@c62443-a.frmt1.sfba.home.com>
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Arun Sharma writes: > > For Intel processors, CPUID instruction spits out both L1 and L2 cache > sizes. Perhaps, these things should be made a runtime option than a > compile time option ? That sounds like a good idea. Also, I imagine that it would be possible to write a function to emperically determine the system cache size on non Intel CPUs where such an instruction is not available. Eg, Alpha processors don't specify the amount of Bcache (secondary or tertiary) cache they have & Tru64 sizes them on the fly. Cheers, Drew ------------------------------------------------------------------------------ Andrew Gallatin, Sr Systems Programmer http://www.cs.duke.edu/~gallatin Duke University Email: gallatin@cs.duke.edu Department of Computer Science Phone: (919) 660-6590 To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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