Date: Sat, 31 Jul 2010 12:17:05 GMT From: Hans Petter Selasky <hselasky@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 181637 for review Message-ID: <201007311217.o6VCH5Ue053932@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://p4web.freebsd.org/@@181637?ac=10 Change 181637 by hselasky@hselasky_laptop001 on 2010/07/31 12:16:45 USB controller (XHCI): - add more register definitions Affected files ... .. //depot/projects/usb/src/sys/dev/usb/controller/xhcireg.h#5 edit Differences ... ==== //depot/projects/usb/src/sys/dev/usb/controller/xhcireg.h#5 (text+ko) ==== @@ -107,7 +107,7 @@ #define XHCI_DCBAAP_LO 0x30 /* XHCI dev context BA pointer */ #define XHCI_DCBAAP_HI 0x34 /* XHCI dev context BA pointer */ #define XHCI_CONFIG 0x38 -#define XHCI_CONFIG_SLOTS_MASK 0x000000FF /* RW - number of device slot enabled */ +#define XHCI_CONFIG_SLOTS_MASK 0x000000FF /* RW - number of device slots enabled */ /* XHCI port status registers */ #define XHCI_PORTSC(n) (0x3F0 + (0x10 * (n))) /* XHCI port status */ @@ -175,13 +175,25 @@ #define XHCI_ERSTDP_LO_BUSY 0x00000008 /* RW - event handler busy */ #define XHCI_ERSTDP_HI(n) (0x003C + (0x20 * (n)) /* XHCI event ring dequeue pointer */ -/* XHCI doorbell registers. Offset given by XHCI_CAPLENGTH + XHCI_DBOFF registers */ +/* XHCI doorbell registers. Offset given by XHCI_CAPLENGTH + XHCI_DBOFF registers */ #define XHCI_DOORBELL 0x0000 #define XHCI_DB_TARGET_GET(x) ((x) & 0xFF) /* RW - doorbell target */ #define XHCI_DB_TARGET_SET(x) ((x) & 0xFF) /* RW - doorbell target */ #define XHCI_DB_SID_GET(x) (((x) >> 16) & 0xFFFF) /* RW - doorbell stream ID */ #define XHCI_DB_SID_SET(x) (((x) & 0xFFFF) << 16) /* RW - doorbell stream ID */ +/* XHCI interrupter registers. Offset given by XHCI_CAPLENGTH + XHCI_RTSOFF registers */ +#define XHCI_IMAN(i) (0x0020 + (0x20 * (i))) /* RW - interrupt management */ +#define XHCI_IMAN_IP_BIT (1U << 0) /* interrupt pending */ +#define XHCI_IMAN_IE_BIT (1U << 1) /* interrupt enable */ +#define XHCI_IMOD(i) (0x0024 + (0x20 * (i))) /* RW - interrupt moderation */ +#define XHCI_IMOD_DEFAULT 0x000001F4U /* 8000 IRQ/second */ +#define XHCI_ERSTSZ(i) (0x0028 + (0x20 * (i))) /* RW - segment table size */ +#define XHCI_ERSTBA_LO(i) (0x0030 + (0x20 * (i))) /* RW - segment base address */ +#define XHCI_ERSTBA_HI(i) (0x0034 + (0x20 * (i))) /* RW - segment base address */ +#define XHCI_ERDP_LO(i) (0x0038 + (0x20 * (i))) /* RW - dequeue pointer */ +#define XHCI_ERDP_HI(i) (0x003C + (0x20 * (i))) /* RW - dequeue pointer */ + /* XHCI register R/W wrappers */ #define XREAD1(sc, what, a) \ bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, \
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201007311217.o6VCH5Ue053932>