From owner-svn-src-all@FreeBSD.ORG Wed Jan 26 21:14:20 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7FCC2106578E; Wed, 26 Jan 2011 21:14:20 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 547678FC0A; Wed, 26 Jan 2011 21:14:20 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p0QLEK7V090368; Wed, 26 Jan 2011 21:14:20 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p0QLEKQR090365; Wed, 26 Jan 2011 21:14:20 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <201101262114.p0QLEKQR090365@svn.freebsd.org> From: Pyun YongHyeon Date: Wed, 26 Jan 2011 21:14:20 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r217911 - in head/sys: dev/re pci X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Jan 2011 21:14:20 -0000 Author: yongari Date: Wed Jan 26 21:14:20 2011 New Revision: 217911 URL: http://svn.freebsd.org/changeset/base/217911 Log: Add support for RTL8105E PCIe Fast Ethernet controller. It seems the controller has a kind of embedded controller/memory and vendor applies a large set of magic code via undocumented PHY registers in device initialization stage. I guess it's a firmware image for the embedded controller in RTL8105E since the code is too big compared to other DSP fixups. However I have no idea what that magic code does and what's purpose of the embedded controller. Fortunately driver seems to still work without loading the firmware. While I'm here change device description of RTL810xE controller. H/W donated by: Realtek Semiconductor Corp. Modified: head/sys/dev/re/if_re.c head/sys/pci/if_rlreg.h Modified: head/sys/dev/re/if_re.c ============================================================================== --- head/sys/dev/re/if_re.c Wed Jan 26 21:07:44 2011 (r217910) +++ head/sys/dev/re/if_re.c Wed Jan 26 21:14:20 2011 (r217911) @@ -177,7 +177,7 @@ static struct rl_type re_devs[] = { { RT_VENDORID, RT_DEVICEID_8139, 0, "RealTek 8139C+ 10/100BaseTX" }, { RT_VENDORID, RT_DEVICEID_8101E, 0, - "RealTek 8101E/8102E/8102EL/8103E PCIe 10/100baseTX" }, + "RealTek 810xE PCIe 10/100baseTX" }, { RT_VENDORID, RT_DEVICEID_8168, 0, "RealTek 8168/8111 B/C/CP/D/DP/E PCIe Gigabit Ethernet" }, { RT_VENDORID, RT_DEVICEID_8169, 0, @@ -217,6 +217,7 @@ static struct rl_hwrev re_hwrevs[] = { { RL_HWREV_8102EL, RL_8169, "8102EL", RL_MTU }, { RL_HWREV_8102EL_SPIN1, RL_8169, "8102EL", RL_MTU }, { RL_HWREV_8103E, RL_8169, "8103E", RL_MTU }, + { RL_HWREV_8105E, RL_8169, "8105E", RL_MTU }, { RL_HWREV_8168B_SPIN2, RL_8169, "8168", RL_JUMBO_MTU }, { RL_HWREV_8168B_SPIN3, RL_8169, "8168", RL_JUMBO_MTU }, { RL_HWREV_8168C, RL_8169, "8168C/8111C", RL_JUMBO_MTU_6K }, @@ -1376,6 +1377,11 @@ re_attach(device_t dev) RL_FLAG_MACSTAT | RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_MACSLEEP; break; + case RL_HWREV_8105E: + sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM | + RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | + RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD; + break; case RL_HWREV_8168B_SPIN1: case RL_HWREV_8168B_SPIN2: sc->rl_flags |= RL_FLAG_WOLRXENB; Modified: head/sys/pci/if_rlreg.h ============================================================================== --- head/sys/pci/if_rlreg.h Wed Jan 26 21:07:44 2011 (r217910) +++ head/sys/pci/if_rlreg.h Wed Jan 26 21:14:20 2011 (r217911) @@ -176,6 +176,7 @@ #define RL_HWREV_8168C 0x3C000000 #define RL_HWREV_8168C_SPIN2 0x3C400000 #define RL_HWREV_8168CP 0x3C800000 +#define RL_HWREV_8105E 0x40800000 #define RL_HWREV_8139 0x60000000 #define RL_HWREV_8139A 0x70000000 #define RL_HWREV_8139AG 0x70800000