From owner-p4-projects@FreeBSD.ORG Thu Oct 18 08:58:52 2007 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 8ADBA16A419; Thu, 18 Oct 2007 08:58:52 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1A59716A418 for ; Thu, 18 Oct 2007 08:58:52 +0000 (UTC) (envelope-from jb@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 05E0413C44B for ; Thu, 18 Oct 2007 08:58:52 +0000 (UTC) (envelope-from jb@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id l9I8wpEH031759 for ; Thu, 18 Oct 2007 08:58:51 GMT (envelope-from jb@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id l9I8wp34031756 for perforce@freebsd.org; Thu, 18 Oct 2007 08:58:51 GMT (envelope-from jb@freebsd.org) Date: Thu, 18 Oct 2007 08:58:51 GMT Message-Id: <200710180858.l9I8wp34031756@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jb@freebsd.org using -f From: John Birrell To: Perforce Change Reviews Cc: Subject: PERFORCE change 127677 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Oct 2007 08:58:52 -0000 http://perforce.freebsd.org/chv.cgi?CH=127677 Change 127677 by jb@jb_freebsd1 on 2007/10/18 08:58:20 IFC Affected files ... .. //depot/projects/dtrace/ports/MOVED#45 integrate .. //depot/projects/dtrace/ports/Mk/bsd.port.mk#13 integrate .. //depot/projects/dtrace/src/etc/Makefile#9 integrate .. //depot/projects/dtrace/src/etc/nscd.conf#1 branch .. //depot/projects/dtrace/src/lib/libc/net/nscache.c#3 integrate .. //depot/projects/dtrace/src/lib/libc/powerpc/Symbol.map#4 integrate .. //depot/projects/dtrace/src/release/doc/en_US.ISO8859-1/relnotes/article.sgml#9 integrate .. //depot/projects/dtrace/src/share/mk/version_gen.awk#4 integrate .. //depot/projects/dtrace/src/share/termcap/termcap.src#6 integrate .. //depot/projects/dtrace/src/sys/arm/arm/cpufunc.c#10 integrate .. //depot/projects/dtrace/src/sys/arm/arm/cpufunc_asm_arm11.S#1 branch .. //depot/projects/dtrace/src/sys/arm/arm/cpufunc_asm_armv5.S#1 branch .. //depot/projects/dtrace/src/sys/arm/arm/cpufunc_asm_armv5_ec.S#1 branch .. //depot/projects/dtrace/src/sys/arm/arm/identcpu.c#8 integrate .. //depot/projects/dtrace/src/sys/arm/at91/at91_mcireg.h#2 integrate .. //depot/projects/dtrace/src/sys/arm/include/armreg.h#7 integrate .. //depot/projects/dtrace/src/sys/arm/include/cpuconf.h#8 integrate .. //depot/projects/dtrace/src/sys/arm/include/cpufunc.h#7 integrate .. //depot/projects/dtrace/src/sys/boot/ofw/libofw/openfirm_mmu.c#4 delete .. //depot/projects/dtrace/src/sys/fs/msdosfs/msdosfs_vnops.c#8 integrate .. //depot/projects/dtrace/src/usr.bin/fmt/fmt.c#4 integrate .. //depot/projects/dtrace/src/usr.bin/locate/locate/locate.rc#5 integrate .. //depot/projects/dtrace/src/usr.bin/locate/locate/updatedb.sh#5 integrate .. //depot/projects/dtrace/src/usr.bin/netstat/sctp.c#2 integrate .. //depot/projects/dtrace/src/usr.bin/tail/read.c#4 integrate .. //depot/projects/dtrace/src/usr.sbin/pkg_install/lib/lib.h#6 integrate .. //depot/projects/dtrace/www/en/ports/Makefile#4 integrate Differences ... ==== //depot/projects/dtrace/ports/MOVED#45 (text+ko) ==== @@ -1,7 +1,7 @@ # # MOVED - a list of (recently) moved or removed ports # -# $FreeBSD: ports/MOVED,v 1.1501 2007/10/16 21:12:31 beech Exp $ +# $FreeBSD: ports/MOVED,v 1.1502 2007/10/17 10:12:24 ade Exp $ # # Each entry consists of a single line containing the following four # fields in the order named, separated with the pipe (`|') character: @@ -3316,3 +3316,4 @@ security/p5-Digest-SHA2||2007-10-16|Has expired: Has numerious known bugs, deprecated in favor of Digest::SHA devel/p5-Devel-Peek||2007-10-16|Has expired: depends on antique versions of perl net/skype-devel||2007-10-16|No longer needed: Please update to net/skype +devel/bison2|devel/bison|2007-10-17|Bison 1.x to 2.x conversion ==== //depot/projects/dtrace/ports/Mk/bsd.port.mk#13 (text+ko) ==== @@ -1,7 +1,7 @@ #-*- mode: makefile; tab-width: 4; -*- # ex:ts=4 # -# $FreeBSD: ports/Mk/bsd.port.mk,v 1.588 2007/10/03 22:24:59 pav Exp $ +# $FreeBSD: ports/Mk/bsd.port.mk,v 1.589 2007/10/17 10:12:24 ade Exp $ # $NetBSD: $ # # bsd.port.mk - 940820 Jordan K. Hubbard. @@ -362,7 +362,10 @@ # - If set, this port uses the GNU version of the ghostscript # software instead of the GPL version, which is used otherwise. ## -# USE_BISON - If set, this port uses bison for building. +# USE_BISON - Implies that the port uses bison in one way or another: +# 'yes' (backwards compatibility) - use bison for building +# new features: 'build', 'run', 'both', implying build, +# runtime, and both build/run dependencies ## # USE_IMAKE - If set, this port uses imake. Implies USE_X_PREFIX. # XMKMF - Set to path of `xmkmf' if not in $PATH @@ -1926,7 +1929,26 @@ .endif .if defined(USE_BISON) -BUILD_DEPENDS+= bison:${PORTSDIR}/devel/bison +_BISON_DEPENDS= bison:${PORTSDIR}/devel/bison + +# XXX: backwards compatibility +. if ${USE_BISON:L} == "yes" +USE_BISON= build +pre-everything:: + @${ECHO_MSG} "WARNING: USE_BISON=yes deprecated, use build/run/both" +. endif + +. if ${USE_BISON:L} == "build" +BUILD_DEPENDS+= ${_BISON_DEPENDS} +. elif ${USE_BISON:L} == "run" +RUN_DEPENDS+= ${_BISON_DEPENDS} +. elif ${USE_BISON:L} == "both" +BUILD_DEPENDS+= ${_BISON_DEPENDS} +RUN_DEPENDS+= ${_BISON_DEPENDS} +. else +IGNORE= uses unknown USE_BISON construct +. endif + .endif .if !defined(_PERL_REFACTORING_COMPLETE) ==== //depot/projects/dtrace/src/etc/Makefile#9 (text+ko) ==== @@ -1,5 +1,5 @@ # from: @(#)Makefile 5.11 (Berkeley) 5/21/91 -# $FreeBSD: src/etc/Makefile,v 1.362 2007/10/15 20:00:18 netchild Exp $ +# $FreeBSD: src/etc/Makefile,v 1.363 2007/10/18 08:26:20 bushman Exp $ .include @@ -37,7 +37,7 @@ .endif .if ${MK_NS_CACHING} != "no" -BIN1+= cached.conf +BIN1+= nscd.conf .endif .if ${MK_OPENSSH} != "no" ==== //depot/projects/dtrace/src/lib/libc/net/nscache.c#3 (text) ==== @@ -26,7 +26,7 @@ */ #include -__FBSDID("$FreeBSD: src/lib/libc/net/nscache.c,v 1.1 2006/04/28 12:03:35 ume Exp $"); +__FBSDID("$FreeBSD: src/lib/libc/net/nscache.c,v 1.2 2007/10/17 23:20:49 tmclaugh Exp $"); #include "namespace.h" #include @@ -42,7 +42,7 @@ #define NSS_CACHE_BUFFER_INITIAL_SIZE (1024) #define NSS_CACHE_BUFFER_SIZE_LIMIT (NSS_CACHE_BUFFER_INITIAL_SIZE << 8) -#define CACHED_SOCKET_PATH "/var/run/cached" +#define CACHED_SOCKET_PATH "/var/run/nscd" int __nss_cache_handler(void *retval, void *mdata, va_list ap) ==== //depot/projects/dtrace/src/lib/libc/powerpc/Symbol.map#4 (text) ==== @@ -1,5 +1,5 @@ /* - * $FreeBSD: src/lib/libc/powerpc/Symbol.map,v 1.5 2007/05/31 13:01:34 deischen Exp $ + * $FreeBSD: src/lib/libc/powerpc/Symbol.map,v 1.6 2007/10/18 07:23:31 grehan Exp $ */ /* @@ -35,7 +35,6 @@ ntohs; brk; exect; - pipe; sbrk; vfork; }; @@ -52,7 +51,7 @@ __longjmp; signalcontext; __signalcontext; - __syncicache;; + __syncicache; _end; .curbrk; .minbrk; ==== //depot/projects/dtrace/src/release/doc/en_US.ISO8859-1/relnotes/article.sgml#9 (text+ko) ==== @@ -20,7 +20,7 @@ The &os; Project - $FreeBSD: src/release/doc/en_US.ISO8859-1/relnotes/article.sgml,v 1.1069 2007/10/11 20:44:38 delphij Exp $ + $FreeBSD: src/release/doc/en_US.ISO8859-1/relnotes/article.sgml,v 1.1070 2007/10/17 17:52:31 delphij Exp $ 2000 @@ -2314,7 +2314,7 @@ 4.1.8 to 4.1.23. less has been updated from v381 - to v408. &merged; + to v409. &merged; libpcap has been updated from 0.9.1 to 0.9.4. &merged; ==== //depot/projects/dtrace/src/share/mk/version_gen.awk#4 (text) ==== @@ -22,7 +22,7 @@ # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # SUCH DAMAGE. # -# $FreeBSD: src/share/mk/version_gen.awk,v 1.3 2007/07/21 20:52:32 kan Exp $ +# $FreeBSD: src/share/mk/version_gen.awk,v 1.4 2007/10/17 20:09:56 yar Exp $ # # @@ -34,6 +34,8 @@ # version name. # symbols[][] - array index by [version name, symbol index], contains # names of symbols defined for each version. +# names[] - array index is symbol name and value is count, +# used to check for duplicate symbols and warn about them. # BEGIN { brackets = 0; @@ -45,10 +47,13 @@ # Strip comments. sub("#.*$", "", $0); - # Strip trailing spaces. - sub(" *$", "", $0); + # Strip leading and trailing whitespace. + sub("^[ \t]+", "", $0); + sub("[ \t]+$", "", $0); - if (/^[ \t]*[a-zA-Z0-9._]+ *{/) { + if (/^[a-zA-Z0-9._]+[ \t]*{$/) { + # Strip brace. + sub("{", "", $1); brackets++; symver = $1; versions[symver] = 1; @@ -56,39 +61,56 @@ generated[symver] = 0; version_count++; } - else if (/^[ \t]*} *[a-zA-Z0-9._]+ *;/) { + else if (/^}[ \t]*[a-zA-Z0-9._]+[ \t]*;$/) { + v = $1 != "}" ? $1 : $2; + # Strip brace. + sub("}", "", v); # Strip semicolon. - gsub(";", "", $2); - if (symver == "") - printf("Unmatched bracket.\n"); - else if (versions[$2] != 1) - printf("File %s: %s has unknown " \ - "successor %s\n", vfile, symver, $2); + sub(";", "", v); + if (symver == "") { + printf("File %s: Unmatched bracket.\n", + vfile) > stderr; + errors++; + } + else if (versions[v] != 1) { + printf("File %s: `%s' has unknown " \ + "successor `%s'.\n", + vfile, symver, v) > stderr; + errors++; + } else - successors[symver] = $2; + successors[symver] = v; brackets--; } - else if (/^[ \t]*};/) { - if (symver == "") + else if (/^}[ \t]*;$/) { + if (symver == "") { printf("File %s: Unmatched bracket.\n", vfile) > stderr; + errors++; + } # No successor brackets--; } - else if (/^[ \t]*}/) { - printf("File %s: Missing ending semi-colon.\n", + else if (/^}$/) { + printf("File %s: Missing final semicolon.\n", vfile) > stderr; + errors++; } else if (/^$/) ; # Ignore blank lines. - else - printf("File %s: Unknown directive: %s\n", + else { + printf("File %s: Unknown directive: `%s'.\n", vfile, $0) > stderr; + errors++; + } } brackets = 0; } -/.*/ { +{ + # Set meaningful filename for diagnostics. + filename = FILENAME != "" ? FILENAME : ""; + # Delete comments, preceding and trailing whitespace, then # consume blank lines. sub("#.*$", "", $0); @@ -98,15 +120,18 @@ next; } -/^[a-zA-Z0-9._]+ +{$/ { +/^[a-zA-Z0-9._]+[ \t]*{$/ { # Strip bracket from version name. sub("{", "", $1); - if (current_version != "") + if (current_version != "") { printf("File %s, line %d: Illegal nesting detected.\n", - FILENAME, FNR) > stderr; + filename, FNR) > stderr; + errors++; + } else if (versions[$1] == 0) { printf("File %s, line %d: Undefined " \ - "library version %s\n", FILENAME, FNR, $1) > stderr; + "library version `%s'.\n", filename, FNR, $1) > stderr; + errors++; # Remove this entry from the versions. delete versions[$1]; } @@ -116,20 +141,34 @@ next; } -/^[a-zA-Z0-9._]+ *;$/ { +/^[a-zA-Z0-9._]+[ \t]*;$/ { + # Strip semicolon. + sub(";", "", $1); if (current_version != "") { count = versions[current_version]; versions[current_version]++; symbols[current_version, count] = $1; + if (names[$1]++) { + printf("File %s, line %d: Duplicated symbol `%s'. " \ + "Did you forget to move it to ObsoleteVersions?\n", + filename, FNR, $1) > stderr; + errors++; + } } + else { + printf("File %s, line %d: Symbol `%s' outside version scope.\n", + filename, FNR, $1) > stderr; + errors++; + } next; } -/^} *;$/ { +/^}[ \t]*;$/ { brackets--; if (brackets < 0) { printf("File %s, line %d: Unmatched bracket.\n", - FILENAME, FNR, $1) > stderr; + filename, FNR, $1) > stderr; + errors++; brackets = 0; # Reset } current_version = ""; @@ -137,9 +176,10 @@ } -/.*/ { - printf("File %s, line %d: Unknown directive: '%s'\n", - FILENAME, FNR, $0) > stderr; +{ + printf("File %s, line %d: Unknown directive: `%s'.\n", + filename, FNR, $0) > stderr; + errors++; } function print_version(v) @@ -162,7 +202,7 @@ for (i = 1; i < versions[v]; i++) { if (i == 1) printf("global:\n"); - printf("\t%s\n", symbols[v, i]); + printf("\t%s;\n", symbols[v, i]); } version_count--; @@ -178,7 +218,13 @@ generated[v] = 1; } + END { + if (errors) { + printf("%d errors total.\n", errors) > stderr; + exit(1); + } + # OK, no errors. for (v in versions) { print_version(v); } ==== //depot/projects/dtrace/src/share/termcap/termcap.src#6 (text+ko) ==== @@ -30,7 +30,7 @@ # SUCH DAMAGE. # # @(#)termcap.src 8.2 (Berkeley) 11/17/93 -# $FreeBSD: src/share/termcap/termcap.src,v 1.148 2006/04/30 09:05:56 matteo Exp $ +# $FreeBSD: src/share/termcap/termcap.src,v 1.149 2007/10/17 19:58:50 yar Exp $ # Termcap source file # John Kunze, Berkeley @@ -2821,7 +2821,7 @@ :eA=\E(B\E)0:as=\E(0:ae=\E(B:ml=\El:mu=\Em:up=\E[A:nd=\E[C:\ :md=\E[1m:me=\E[m:mr=\E[7m:so=\E[7m:se=\E[27m:us=\E[4m:ue=\E[24m:\ :ti=\E[?1049h:te=\E[?1049l:vi=\E[?25l:ve=\E[?25h:\ - :ut:Co#8:pa#64:op=\E[39;49m:AB=\E[4%dm:AF=\E[3%dm:\ + :ut:Co#8:pa#64:op=\E[39;49m:AB=\E[4%dm:AF=\E[3%dm: # The xterm-xfree86 description has all of the features, but is not completely # compatible with vt220. If you are using a Sun or PC keyboard, set the ==== //depot/projects/dtrace/src/sys/arm/arm/cpufunc.c#10 (text+ko) ==== @@ -45,7 +45,7 @@ * Created : 30/01/97 */ #include -__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.18 2007/08/07 18:37:21 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.19 2007/10/18 05:33:05 imp Exp $"); #include #include @@ -296,6 +296,64 @@ }; #endif /* CPU_ARM9 */ +#if defined(CPU_ARM9E) || defined(CPU_ARM10) +struct cpu_functions armv5_ec_cpufuncs = { + /* CPU functions */ + + cpufunc_id, /* id */ + cpufunc_nullop, /* cpwait */ + + /* MMU functions */ + + cpufunc_control, /* control */ + cpufunc_domains, /* Domain */ + armv5_ec_setttb, /* Setttb */ + cpufunc_faultstatus, /* Faultstatus */ + cpufunc_faultaddress, /* Faultaddress */ + + /* TLB functions */ + + armv4_tlb_flushID, /* tlb_flushID */ + arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + armv4_tlb_flushI, /* tlb_flushI */ + arm10_tlb_flushI_SE, /* tlb_flushI_SE */ + armv4_tlb_flushD, /* tlb_flushD */ + armv4_tlb_flushD_SE, /* tlb_flushD_SE */ + + /* Cache operations */ + + armv5_ec_icache_sync_all, /* icache_sync_all */ + armv5_ec_icache_sync_range, /* icache_sync_range */ + + armv5_ec_dcache_wbinv_all, /* dcache_wbinv_all */ + armv5_ec_dcache_wbinv_range, /* dcache_wbinv_range */ +/*XXX*/ armv5_ec_dcache_wbinv_range, /* dcache_inv_range */ + armv5_ec_dcache_wb_range, /* dcache_wb_range */ + + armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all */ + armv5_ec_idcache_wbinv_range, /* idcache_wbinv_range */ + + /* Other functions */ + + cpufunc_nullop, /* flush_prefetchbuf */ + armv4_drain_writebuf, /* drain_writebuf */ + cpufunc_nullop, /* flush_brnchtgt_C */ + (void *)cpufunc_nullop, /* flush_brnchtgt_E */ + + (void *)cpufunc_nullop, /* sleep */ + + /* Soft functions */ + + cpufunc_null_fixup, /* dataabt_fixup */ + cpufunc_null_fixup, /* prefetchabt_fixup */ + + arm10_context_switch, /* context_switch */ + + arm10_setup /* cpu setup */ + +}; +#endif /* CPU_ARM9E || CPU_ARM10 */ + #ifdef CPU_ARM10 struct cpu_functions arm10_cpufuncs = { /* CPU functions */ @@ -869,6 +927,16 @@ goto out; } #endif /* CPU_ARM9 */ +#if defined(CPU_ARM9E) || defined(CPU_ARM10) + if (cputype == CPU_ID_ARM926EJS || + cputype == CPU_ID_ARM1026EJS) { + cpufuncs = armv5_ec_cpufuncs; + cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ + get_cachetype_cp15(); + pmap_pte_init_generic(); + return 0; + } +#endif /* CPU_ARM9E || CPU_ARM10 */ #ifdef CPU_ARM10 if (/* cputype == CPU_ID_ARM1020T || */ cputype == CPU_ID_ARM1020E) { @@ -1434,10 +1502,12 @@ */ #if defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined (CPU_ARM9) || \ + defined(CPU_ARM9E) || \ defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \ defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ - defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) + defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ + defined(CPU_ARM10) || defined(CPU_ARM11) #define IGN 0 #define OR 1 @@ -1679,7 +1749,7 @@ } #endif /* CPU_ARM9 */ -#ifdef CPU_ARM10 +#if defined(CPU_ARM9E) || defined(CPU_ARM10) struct cpu_option arm10_options[] = { { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, @@ -1722,7 +1792,7 @@ cpu_idcache_wbinv_all(); /* Now really make sure they are clean. */ - asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : ); + __asm __volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : ); /* Set the control register */ ctrl = cpuctrl; @@ -1731,7 +1801,57 @@ /* And again. */ cpu_idcache_wbinv_all(); } -#endif /* CPU_ARM10 */ +#endif /* CPU_ARM9E || CPU_ARM10 */ + +#ifdef CPU_ARM11 +struct cpu_option arm11_options[] = { + { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, + { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, + { "arm11.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, + { "arm11.icache", BIC, OR, CPU_CONTROL_IC_ENABLE }, + { "arm11.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE }, + { NULL, IGN, IGN, 0 } +}; + +void +arm11_setup(args) + char *args; +{ + int cpuctrl, cpuctrlmask; + + cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE + | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE + /* | CPU_CONTROL_BPRD_ENABLE */; + cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE + | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE + | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE + | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE + | CPU_CONTROL_ROUNDROBIN | CPU_CONTROL_CPCLK; + +#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS + cpuctrl |= CPU_CONTROL_AFLT_ENABLE; +#endif + + cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl); + +#ifdef __ARMEB__ + cpuctrl |= CPU_CONTROL_BEND_ENABLE; +#endif + + /* Clear out the cache */ + cpu_idcache_wbinv_all(); + + /* Now really make sure they are clean. */ + __asm __volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : ); + + /* Set the control register */ + curcpu()->ci_ctrl = cpuctrl; + cpu_control(0xffffffff, cpuctrl); + + /* And again. */ + cpu_idcache_wbinv_all(); +} +#endif /* CPU_ARM11 */ #ifdef CPU_SA110 struct cpu_option sa110_options[] = { ==== //depot/projects/dtrace/src/sys/arm/arm/identcpu.c#8 (text+ko) ==== @@ -42,7 +42,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.11 2007/07/27 14:49:11 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.12 2007/10/18 05:33:05 imp Exp $"); #include #include #include @@ -70,9 +70,12 @@ CPU_CLASS_ARM8, CPU_CLASS_ARM9TDMI, CPU_CLASS_ARM9ES, + CPU_CLASS_ARM9EJS, CPU_CLASS_ARM10E, + CPU_CLASS_ARM10EJ, CPU_CLASS_SA1, - CPU_CLASS_XSCALE + CPU_CLASS_XSCALE, + CPU_CLASS_ARM11J }; static const char * const generic_steppings[16] = { @@ -119,6 +122,13 @@ "rev 12", "rev 13", "rev 14", "rev 15", }; +static const char * const i80219_steppings[16] = { + "step A-0", "rev 1", "rev 2", "rev 3", + "rev 4", "rev 5", "rev 6", "rev 7", + "rev 8", "rev 9", "rev 10", "rev 11", + "rev 12", "rev 13", "rev 14", "rev 15", +}; + static const char * const i80321_steppings[16] = { "step A-0", "step B-0", "rev 2", "rev 3", "rev 4", "rev 5", "rev 6", "rev 7", @@ -133,6 +143,7 @@ "rev 12", "rev 13", "rev 14", "rev 15", }; +/* Steppings for PXA2[15]0 */ static const char * const pxa2x0_steppings[16] = { "step A-0", "step A-1", "step B-0", "step B-1", "step B-2", "step C-0", "rev 6", "rev 7", @@ -140,6 +151,24 @@ "rev 12", "rev 13", "rev 14", "rev 15", }; +/* Steppings for PXA255/26x. + * rev 5: PXA26x B0, rev 6: PXA255 A0 + */ +static const char * const pxa255_steppings[16] = { + "rev 0", "rev 1", "rev 2", "step A-0", + "rev 4", "step B-0", "step A-0", "rev 7", + "rev 8", "rev 9", "rev 10", "rev 11", + "rev 12", "rev 13", "rev 14", "rev 15", +}; + +/* Stepping for PXA27x */ +static const char * const pxa27x_steppings[16] = { + "step A-0", "step A-1", "step B-0", "step B-1", + "step C-0", "rev 5", "rev 6", "rev 7", + "rev 8", "rev 9", "rev 10", "rev 11", + "rev 12", "rev 13", "rev 14", "rev 15", +}; + static const char * const ixp425_steppings[16] = { "step 0 (A0)", "rev 1 (ARMv5TE)", "rev 2", "rev 3", "rev 4", "rev 5", "rev 6", "rev 7", @@ -198,6 +227,8 @@ generic_steppings }, { CPU_ID_ARM922T, CPU_CLASS_ARM9TDMI, "ARM922T", generic_steppings }, + { CPU_ID_ARM926EJS, CPU_CLASS_ARM9EJS, "ARM926EJ-S", + generic_steppings }, { CPU_ID_ARM940T, CPU_CLASS_ARM9TDMI, "ARM940T", generic_steppings }, { CPU_ID_ARM946ES, CPU_CLASS_ARM9ES, "ARM946E-S", @@ -213,6 +244,8 @@ generic_steppings }, { CPU_ID_ARM1022ES, CPU_CLASS_ARM10E, "ARM1022E-S", generic_steppings }, + { CPU_ID_ARM1026EJS, CPU_CLASS_ARM10EJ, "ARM1026EJ-S", + generic_steppings }, { CPU_ID_SA110, CPU_CLASS_SA1, "SA-110", sa110_steppings }, @@ -240,11 +273,12 @@ i81342_steppings }, { CPU_ID_80219_400, CPU_CLASS_XSCALE, "i80219 400MHz", - xscale_steppings }, - + i80219_steppings }, { CPU_ID_80219_600, CPU_CLASS_XSCALE, "i80219 600MHz", - xscale_steppings }, + i80219_steppings }, + { CPU_ID_PXA27X, CPU_CLASS_XSCALE, "PXA27x", + pxa27x_steppings }, { CPU_ID_PXA250A, CPU_CLASS_XSCALE, "PXA250", pxa2x0_steppings }, { CPU_ID_PXA210A, CPU_CLASS_XSCALE, "PXA210", @@ -253,8 +287,8 @@ pxa2x0_steppings }, { CPU_ID_PXA210B, CPU_CLASS_XSCALE, "PXA210", pxa2x0_steppings }, - { CPU_ID_PXA250C, CPU_CLASS_XSCALE, "PXA250", - pxa2x0_steppings }, + { CPU_ID_PXA250C, CPU_CLASS_XSCALE, "PXA255", + pxa255_steppings }, { CPU_ID_PXA210C, CPU_CLASS_XSCALE, "PXA210", pxa2x0_steppings }, @@ -265,6 +299,11 @@ { CPU_ID_IXP425_266, CPU_CLASS_XSCALE, "IXP425 266MHz", ixp425_steppings }, + { CPU_ID_ARM1136JS, CPU_CLASS_ARM11J, "ARM1136J-S", + generic_steppings }, + { CPU_ID_ARM1136JSR1, CPU_CLASS_ARM11J, "ARM1136J-S R1", + generic_steppings }, + { 0, CPU_CLASS_NONE, NULL, NULL } }; @@ -283,10 +322,13 @@ { "ARM7TDMI", "CPU_ARM7TDMI" }, /* CPU_CLASS_ARM7TDMI */ { "ARM8", "CPU_ARM8" }, /* CPU_CLASS_ARM8 */ { "ARM9TDMI", "CPU_ARM9TDMI" }, /* CPU_CLASS_ARM9TDMI */ - { "ARM9E-S", NULL }, /* CPU_CLASS_ARM9ES */ + { "ARM9E-S", "CPU_ARM9E" }, /* CPU_CLASS_ARM9ES */ + { "ARM9EJ-S", "CPU_ARM9E" }, /* CPU_CLASS_ARM9EJS */ { "ARM10E", "CPU_ARM10" }, /* CPU_CLASS_ARM10E */ + { "ARM10EJ", "CPU_ARM10" }, /* CPU_CLASS_ARM10EJ */ { "SA-1", "CPU_SA110" }, /* CPU_CLASS_SA1 */ { "XScale", "CPU_XSCALE_..." }, /* CPU_CLASS_XSCALE */ + { "ARM11J", "CPU_ARM11" }, /* CPU_CLASS_ARM11J */ }; /* @@ -310,7 +352,7 @@ "**unknown 11**", "**unknown 12**", "**unknown 13**", - "**unknown 14**", + "write-back-locking-C", "**unknown 15**", }; @@ -363,9 +405,13 @@ printf(" IDC enabled"); break; case CPU_CLASS_ARM9TDMI: + case CPU_CLASS_ARM9ES: + case CPU_CLASS_ARM9EJS: case CPU_CLASS_ARM10E: + case CPU_CLASS_ARM10EJ: case CPU_CLASS_SA1: case CPU_CLASS_XSCALE: + case CPU_CLASS_ARM11J: if ((ctrl & CPU_CONTROL_DC_ENABLE) == 0) printf(" DC disabled"); else ==== //depot/projects/dtrace/src/sys/arm/at91/at91_mcireg.h#2 (text+ko) ==== @@ -23,10 +23,10 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* $FreeBSD: src/sys/arm/at91/at91_mcireg.h,v 1.1 2006/10/20 06:44:04 imp Exp $ */ +/* $FreeBSD: src/sys/arm/at91/at91_mcireg.h,v 1.2 2007/10/18 05:43:44 imp Exp $ */ -#ifndef ARM_AT91_AT91QDMMCREG_H -#define ARM_AT91_AT91QDMMCREG_H +#ifndef ARM_AT91_AT91_MCIREG_H +#define ARM_AT91_AT91_MCIREG_H #define MMC_MAX 30 @@ -125,4 +125,4 @@ #define AT91C_BUS_WIDTH_1BIT 0x00 #define AT91C_BUS_WIDTH_4BITS 0x02 -#endif /* ARM_AT91_AT91QDMMCREG_H */ +#endif /* ARM_AT91_AT91_MCIREG_H */ ==== //depot/projects/dtrace/src/sys/arm/include/armreg.h#7 (text+ko) ==== @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.28 2003/10/31 16:30:15 scw Exp $ */ +/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ /*- * Copyright (c) 1998, 2001 Ben Harris @@ -35,11 +35,12 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/arm/include/armreg.h,v 1.6 2007/07/27 14:54:27 cognet Exp $ + * $FreeBSD: src/sys/arm/include/armreg.h,v 1.7 2007/10/18 05:06:58 imp Exp $ */ #ifndef MACHINE_ARMREG_H #define MACHINE_ARMREG_H + #define INSN_SIZE 4 #define INSN_COND_MASK 0xf0000000 /* Condition mask */ #define PSR_MODE 0x0000001f /* mode mask */ @@ -65,6 +66,7 @@ #define CPU_ID_DEC 0x44000000 /* 'D' */ #define CPU_ID_INTEL 0x69000000 /* 'i' */ #define CPU_ID_TI 0x54000000 /* 'T' */ +#define CPU_ID_FARADAY 0x66000000 /* 'f' */ /* How to decide what format the CPUID is in. */ #define CPU_ID_ISOLD(x) (((x) & 0x0000f000) == 0x00000000) @@ -89,6 +91,8 @@ #define CPU_ID_ARCH_V5 0x00030000 #define CPU_ID_ARCH_V5T 0x00040000 #define CPU_ID_ARCH_V5TE 0x00050000 +#define CPU_ID_ARCH_V5TEJ 0x00060000 +#define CPU_ID_ARCH_V6 0x00070000 #define CPU_ID_VARIANT_MASK 0x00f00000 /* Next three nybbles are part number */ @@ -118,7 +122,7 @@ /* ARM7 CPUs -- [15:12] == 7 */ #define CPU_ID_ARM700 0x41007000 /* XXX This is a guess. */ #define CPU_ID_ARM710 0x41007100 -#define CPU_ID_ARM7500 0x41027100 /* XXX This is a guess. */ +#define CPU_ID_ARM7500 0x41027100 #define CPU_ID_ARM710A 0x41047100 /* inc ARM7100 */ #define CPU_ID_ARM7500FE 0x41077100 #define CPU_ID_ARM710T 0x41807100 @@ -131,15 +135,20 @@ #define CPU_ID_ARM920T 0x41129200 #define CPU_ID_ARM920T_ALT 0x41009200 #define CPU_ID_ARM922T 0x41029220 +#define CPU_ID_ARM926EJS 0x41069260 #define CPU_ID_ARM940T 0x41029400 /* XXX no MMU */ #define CPU_ID_ARM946ES 0x41049460 /* XXX no MMU */ #define CPU_ID_ARM966ES 0x41049660 /* XXX no MMU */ #define CPU_ID_ARM966ESR1 0x41059660 /* XXX no MMU */ #define CPU_ID_ARM1020E 0x4115a200 /* (AKA arm10 rev 1) */ #define CPU_ID_ARM1022ES 0x4105a220 +#define CPU_ID_ARM1026EJS 0x4106a260 +#define CPU_ID_ARM1136JS 0x4107b360 +#define CPU_ID_ARM1136JSR1 0x4117b360 #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 #define CPU_ID_TI925T 0x54029250 +#define CPU_ID_FA526 0x66015260 #define CPU_ID_SA1110 0x6901b110 #define CPU_ID_IXP1200 0x6901c120 #define CPU_ID_80200 0x69052000 @@ -151,6 +160,7 @@ #define CPU_ID_PXA210B 0x69052920 /* 3rd version Core */ #define CPU_ID_PXA250C 0x69052d00 /* 4th version Core */ #define CPU_ID_PXA210C 0x69052d20 /* 4th version Core */ +#define CPU_ID_PXA27X 0x69054110 #define CPU_ID_80321_400 0x69052420 #define CPU_ID_80321_600 0x69052430 #define CPU_ID_80321_400_B0 0x69052c20 @@ -305,4 +315,6 @@ #define INSN_COND_MASK 0xf0000000 /* Condition mask */ #define INSN_COND_AL 0xe0000000 /* Always condition */ +#define THUMB_INSN_SIZE 2 /* Some are 4 bytes. */ + #endif /* !MACHINE_ARMREG_H */ ==== //depot/projects/dtrace/src/sys/arm/include/cpuconf.h#8 (text+ko) ==== @@ -34,7 +34,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.10 2006/11/30 23:30:40 cognet Exp $ + * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.11 2007/10/18 05:33:06 imp Exp $ * */ @@ -50,12 +50,22 @@ /* * Step 1: Count the number of CPU types configured into the kernel. */ -#define CPU_NTYPES 2 +#define CPU_NTYPES (defined(CPU_ARM7TDMI) + \ + defined(CPU_ARM8) + defined(CPU_ARM9) + \ + defined(CPU_ARM9E) + \ + defined(CPU_ARM10) + \ + defined(CPU_ARM11) + \ + defined(CPU_SA110) + defined(CPU_SA1100) + \ + defined(CPU_SA1110) + \ + defined(CPU_IXP12X0) + \ + defined(CPU_XSCALE_80200) + \ + defined(CPU_XSCALE_80321) + \ + defined(__CPU_XSCALE_PXA2XX) + \ + defined(CPU_XSCALE_IXP425)) /* * Step 2: Determine which ARM architecture versions are configured. */ - #if (defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \ defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \ defined(CPU_IXP12X0) || defined(CPU_XSCALE_IXP425)) @@ -64,20 +74,35 @@ #define ARM_ARCH_4 0 #endif -#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ - defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ - defined(CPU_XSCALE_PXA2X0)) || defined(CPU_ARM10) +#if (defined(CPU_ARM9E) || defined(CPU_ARM10) || \ + defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ + defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ + defined(CPU_XSCALE_PXA2X0)) #define ARM_ARCH_5 1 #else #define ARM_ARCH_5 0 #endif -#define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5) +#if defined(CPU_ARM11) +#define ARM_ARCH_6 1 +#else +#define ARM_ARCH_6 0 +#endif + +#define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6) #if ARM_NARCH == 0 && !defined(KLD_MODULE) && defined(_KERNEL) #error ARM_NARCH is 0 #endif +#if ARM_ARCH_5 || ARM_ARCH_6 /* + * We could support Thumb code on v4T, but the lack of clean interworking + * makes that hard. + */ +#define THUMB_CODE +#endif + +/* * Step 3: Define which MMU classes are configured: * * ARM_MMU_MEMC Prehistoric, external memory controller @@ -99,7 +124,8 @@ #endif #if (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) || \ - defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM10)) + defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM9E) || \ + defined(CPU_ARM10) || defined(CPU_ARM11)) #define ARM_MMU_GENERIC 1 #else #define ARM_MMU_GENERIC 0 ==== //depot/projects/dtrace/src/sys/arm/include/cpufunc.h#7 (text+ko) ==== @@ -38,7 +38,7 @@ * * Prototypes for cpu, mmu and tlb related functions. * - * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.12 2007/07/27 14:39:41 cognet Exp $ + * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.13 2007/10/18 05:33:06 imp Exp $ */ #ifndef _MACHINE_CPUFUNC_H_ @@ -351,7 +351,7 @@ extern unsigned arm9_dcache_index_inc; #endif -#ifdef CPU_ARM10 +#if defined(CPU_ARM9E) || defined(CPU_ARM10) void arm10_setttb (u_int); void arm10_tlb_flushID_SE (u_int); @@ -378,8 +378,60 @@ extern unsigned arm10_dcache_index_inc; #endif -#if defined(CPU_ARM9) || defined(CPU_ARM10) || defined(CPU_SA110) || \ - defined(CPU_SA1100) || defined(CPU_SA1110) || \ +#ifdef CPU_ARM11 +void arm11_setttb (u_int); + +void arm11_tlb_flushID_SE (u_int); >>> TRUNCATED FOR MAIL (1000 lines) <<<