From owner-cvs-all@FreeBSD.ORG Wed Mar 21 02:00:09 2007 Return-Path: X-Original-To: cvs-all@freebsd.org Delivered-To: cvs-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 6A60F16A408 for ; Wed, 21 Mar 2007 02:00:09 +0000 (UTC) (envelope-from nate@root.org) Received: from root.org (root.org [67.118.192.226]) by mx1.freebsd.org (Postfix) with ESMTP id 4943B13C4AD for ; Wed, 21 Mar 2007 02:00:09 +0000 (UTC) (envelope-from nate@root.org) Received: (qmail 37449 invoked from network); 20 Mar 2007 21:37:58 -0000 Received: from ppp-71-139-35-160.dsl.snfc21.pacbell.net (HELO ?10.0.0.235?) (nate-mail@71.139.35.160) by root.org with ESMTPA; 20 Mar 2007 21:37:58 -0000 Message-ID: <4600542E.8020300@root.org> Date: Tue, 20 Mar 2007 14:37:50 -0700 From: Nate Lawson User-Agent: Thunderbird 1.5.0.7 (X11/20061027) MIME-Version: 1.0 To: Jung-uk Kim References: <20070320202254.AC04416A47C@hub.freebsd.org> In-Reply-To: <20070320202254.AC04416A47C@hub.freebsd.org> X-Enigmail-Version: 0.94.1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: cvs-src@freebsd.org, src-committers@freebsd.org, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/amd64/amd64 identcpu.c src/sys/amd64/include specialreg.h src/sys/i386/i386 identcpu.c src/sys/i386/include specialreg.h X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Mar 2007 02:00:09 -0000 Jung-uk Kim wrote: > jkim 2007-03-20 20:22:46 UTC > > FreeBSD src repository > > Modified files: > sys/amd64/amd64 identcpu.c > sys/amd64/include specialreg.h > sys/i386/i386 identcpu.c > sys/i386/include specialreg.h > Log: > - Add macros for newly added CPUID bits in the corresponding header files. > - Use correct capticalization in xTPR as Intel uses in their documents. > - Use proper description instead of vendor code name in comment. > > Revision Changes Path > 1.152 +2 -2 src/sys/amd64/amd64/identcpu.c > 1.38 +2 -0 src/sys/amd64/include/specialreg.h > 1.174 +2 -2 src/sys/i386/i386/identcpu.c > 1.39 +2 -0 src/sys/i386/include/specialreg.h > > > Index: src/sys/amd64/amd64/identcpu.c > diff -u src/sys/amd64/amd64/identcpu.c:1.151 src/sys/amd64/amd64/identcpu.c:1.152 > --- src/sys/amd64/amd64/identcpu.c:1.151 Tue Mar 20 18:48:04 2007 > +++ src/sys/amd64/amd64/identcpu.c Tue Mar 20 20:22:45 2007 > @@ -225,7 +225,7 @@ > "\004MON" /* MONITOR/MWAIT Instructions */ > "\005DS_CPL" /* CPL Qualified Debug Store */ > "\006VMX" /* Virtual Machine Extensions */ > - "\007SMX" /* LaGrange Technology */ > + "\007SMX" /* Safer Mode Extensions */ > "\010EST" /* Enhanced SpeedStep */ > "\011TM2" /* Thermal Monitor 2 */ > "\012SSSE3" /* SSSE3 */ Thanks. For the record, the previous name should have been "LaGrande Technology". BTW, interested in adding two more features2 bits? My core duo 2 has bits 9 and 15 set for features2. CPU: Intel(R) Core(TM)2 CPU 6400 @ 2.13GHz (2129.19-MHz K8-class CPU) Origin = "GenuineIntel" Id = 0x6f2 Stepping = 2 Features=0xbfebfbff Features2=0xe3bd,CX16,XTPR,> AMD Features=0x20100800 AMD Features2=0x1 Cores per package: 2 -- Nate