From owner-freebsd-hackers Sat Aug 2 16:11:04 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.5/8.8.5) id QAA20691 for hackers-outgoing; Sat, 2 Aug 1997 16:11:04 -0700 (PDT) Received: from phaeton.artisoft.com (phaeton.Artisoft.COM [198.17.250.50]) by hub.freebsd.org (8.8.5/8.8.5) with SMTP id QAA20684 for ; Sat, 2 Aug 1997 16:10:57 -0700 (PDT) Received: (from terry@localhost) by phaeton.artisoft.com (8.6.11/8.6.9) id QAA00461; Sat, 2 Aug 1997 16:10:06 -0700 From: Terry Lambert Message-Id: <199708022310.QAA00461@phaeton.artisoft.com> Subject: Re: Pentium II? To: tony@dell.com (Tony Overfield) Date: Sat, 2 Aug 1997 16:10:06 -0700 (MST) Cc: terry@lambert.org, brianc@milkyway.com, hackers@FreeBSD.ORG In-Reply-To: <3.0.2.32.19970802023853.0069c4c4@bugs.us.dell.com> from "Tony Overfield" at Aug 2, 97 02:38:53 am X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-freebsd-hackers@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk > >Dell was selling them. > > This is wrong! > > Dell sold no such thing as a "P5 DX/2-66"! You guys didn't call them that, but the memory bus was running at 33MHz; that's "clock doubled" in my book. I have a friend who had one until the Pentium math bugs reared their ugly heads (he was an IDE weenie, so he didn't care that PCI bus mastering failed on the thing). > >This was back when they were using the > >Saturn I chipset, which did not have DMA writeback notification > >connected from the macrocell (missing trace). > > Due to that bug, that version of the Saturn chipset does not support > write-back L2 caching and it is therefore configured by the BIOS to > use the L2 cache in write-through mode, though the L1 cache is always > write-back. The missing trace is not used or needed when the L2 > cache is in write-through mode. Unless a DMA initiated by a controller rather than the host occurs. Check the -hackers list archives for postings on disabling the L1 and L2 cache on these monstrosities... > >Dell also had 60MHz non-doubled chips > >available before the doubled 66's were available. > > Well, of course the 66 MHz chips were available after the 60 MHz > chips were, but they weren't "doubled." Maybe not; maybe the memory was just jumpered for an extra wait state; whatever; memory access was half as fast as it should have been in a reasonable implementation. > They probably would have, had the "doubled 66's" ever existed. > > >Just as my 486/50 kicks butt over the same chips. > > I doubt this, unless you're "stacking the deck" in some perverse > way, or you're simply dreaming. Of course I am, if an I/O intensive benchmark is "stacking the deck" and a CPU intensive benchmark is somehow "a good idea". I'm doing disk I/O, of course, and I am overclocking the EISA bus on the machine to 50MHz instead of 2x25. 50MHz EISA transfers data faster than 30MHz PCI... or 33MHz. 8-). Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.