From owner-svn-src-all@FreeBSD.ORG Mon Jul 23 02:26:34 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 17D2B1065672; Mon, 23 Jul 2012 02:26:34 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id ED1828FC08; Mon, 23 Jul 2012 02:26:33 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q6N2QXmD054325; Mon, 23 Jul 2012 02:26:33 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q6N2QXap054321; Mon, 23 Jul 2012 02:26:33 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201207230226.q6N2QXap054321@svn.freebsd.org> From: Adrian Chadd Date: Mon, 23 Jul 2012 02:26:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r238708 - head/sys/dev/ath X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 23 Jul 2012 02:26:34 -0000 Author: adrian Date: Mon Jul 23 02:26:33 2012 New Revision: 238708 URL: http://svn.freebsd.org/changeset/base/238708 Log: Begin modifying the descriptor allocation functions to support a variable sized TX descriptor. This is required for the AR93xx EDMA support which requires 128 byte TX descriptors (which is significantly larger than the earlier hardware.) Modified: head/sys/dev/ath/if_ath.c head/sys/dev/ath/if_ath_tx.c head/sys/dev/ath/if_athvar.h Modified: head/sys/dev/ath/if_ath.c ============================================================================== --- head/sys/dev/ath/if_ath.c Sun Jul 22 23:21:21 2012 (r238707) +++ head/sys/dev/ath/if_ath.c Mon Jul 23 02:26:33 2012 (r238708) @@ -2762,15 +2762,15 @@ ath_descdma_setup(struct ath_softc *sc, uint8_t *ds; struct ath_buf *bf; int i, bsize, error; - int desc_len; - desc_len = sizeof(struct ath_desc); + dd->dd_descsize = sizeof(struct ath_desc); - DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA: %u buffers %u desc/buf\n", - __func__, name, nbuf, ndesc); + DPRINTF(sc, ATH_DEBUG_RESET, + "%s: %s DMA: %u buffers %u desc/buf, %d bytes per descriptor\n", + __func__, name, nbuf, ndesc, dd->dd_descsize); dd->dd_name = name; - dd->dd_desc_len = desc_len * nbuf * ndesc; + dd->dd_desc_len = dd->dd_descsize * nbuf * ndesc; /* * Merlin work-around: @@ -2778,7 +2778,7 @@ ath_descdma_setup(struct ath_softc *sc, * Assume one skipped descriptor per 4KB page. */ if (! ath_hal_split4ktrans(sc->sc_ah)) { - int numdescpage = 4096 / (desc_len * ndesc); + int numdescpage = 4096 / (dd->dd_descsize * ndesc); dd->dd_desc_len = (nbuf / numdescpage + 1) * 4096; } @@ -2845,7 +2845,7 @@ ath_descdma_setup(struct ath_softc *sc, dd->dd_bufptr = bf; TAILQ_INIT(head); - for (i = 0; i < nbuf; i++, bf++, ds += (ndesc * desc_len)) { + for (i = 0; i < nbuf; i++, bf++, ds += (ndesc * dd->dd_descsize)) { bf->bf_desc = (struct ath_desc *) ds; bf->bf_daddr = DS2PHYS(dd, ds); if (! ath_hal_split4ktrans(sc->sc_ah)) { @@ -2855,7 +2855,7 @@ ath_descdma_setup(struct ath_softc *sc, * in the descriptor. */ if (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr, - desc_len * ndesc)) { + dd->dd_descsize * ndesc)) { /* Start at the next page */ ds += 0x1000 - (bf->bf_daddr & 0xFFF); bf->bf_desc = (struct ath_desc *) ds; @@ -2915,7 +2915,8 @@ ath_descdma_setup_rx_edma(struct ath_sof * However, dd_desc_len is used by ath_descdma_free() to determine * whether we have already freed this DMA mapping. */ - dd->dd_desc_len = rx_status_len; + dd->dd_desc_len = rx_status_len * nbuf; + dd->dd_descsize = rx_status_len; /* allocate rx buffers */ bsize = sizeof(struct ath_buf) * nbuf; Modified: head/sys/dev/ath/if_ath_tx.c ============================================================================== --- head/sys/dev/ath/if_ath_tx.c Sun Jul 22 23:21:21 2012 (r238707) +++ head/sys/dev/ath/if_ath_tx.c Mon Jul 23 02:26:33 2012 (r238708) @@ -302,6 +302,11 @@ ath_tx_chaindesclist(struct ath_softc *s struct ath_hal *ah = sc->sc_ah; struct ath_desc *ds, *ds0; int i; + /* + * XXX There's txdma and txdma_mgmt; the descriptor + * sizes must match. + */ + struct ath_descdma *dd = &sc->sc_txdma; /* * Fillin the remainder of the descriptor info. @@ -313,7 +318,7 @@ ath_tx_chaindesclist(struct ath_softc *s ath_hal_settxdesclink(ah, ds, 0); else ath_hal_settxdesclink(ah, ds, - bf->bf_daddr + sizeof(*ds) * (i + 1)); + bf->bf_daddr + dd->dd_descsize * (i + 1)); ath_hal_filltxdesc(ah, ds , bf->bf_segs[i].ds_len /* segment length */ , i == 0 /* first segment */ @@ -341,6 +346,11 @@ ath_tx_chaindesclist_subframe(struct ath struct ath_hal *ah = sc->sc_ah; struct ath_desc *ds, *ds0; int i; + /* + * XXX There's txdma and txdma_mgmt; the descriptor + * sizes must match. + */ + struct ath_descdma *dd = &sc->sc_txdma; ds0 = ds = bf->bf_desc; @@ -354,7 +364,7 @@ ath_tx_chaindesclist_subframe(struct ath ath_hal_settxdesclink(ah, ds, 0); else ath_hal_settxdesclink(ah, ds, - bf->bf_daddr + sizeof(*ds) * (i + 1)); + bf->bf_daddr + dd->dd_descsize * (i + 1)); /* * This performs the setup for an aggregate frame. Modified: head/sys/dev/ath/if_athvar.h ============================================================================== --- head/sys/dev/ath/if_athvar.h Sun Jul 22 23:21:21 2012 (r238707) +++ head/sys/dev/ath/if_athvar.h Mon Jul 23 02:26:33 2012 (r238708) @@ -277,6 +277,7 @@ typedef TAILQ_HEAD(ath_bufhead_s, ath_bu struct ath_descdma { const char* dd_name; struct ath_desc *dd_desc; /* descriptors */ + int dd_descsize; /* size of single descriptor */ bus_addr_t dd_desc_paddr; /* physical addr of dd_desc */ bus_size_t dd_desc_len; /* size of dd_desc */ bus_dma_segment_t dd_dseg;