Date: Sat, 28 Sep 2019 20:12:55 -0500 From: "Clay Daniels Jr." <clay.daniels.jr@gmail.com> To: freebsd-questions@freebsd.org Subject: Re: make.conf for a poudriere jail and CPUTYPE Message-ID: <CAGLDxTXEcD_T=exUk6C15w3ZE%2BrosemmfGu3e1A9obTsUztGqw@mail.gmail.com> In-Reply-To: <20190929000912.GI49516@bastion.zyxst.net> References: <20190927113336.GB49516@bastion.zyxst.net> <20190928121624.GC49516@bastion.zyxst.net> <20190928150629.914bf447.freebsd@edvax.de> <20190928133552.GD49516@bastion.zyxst.net> <CAGLDxTXb8rnzRyc4W%2BQ6umkWbw9KwakAEBG8_NGmi8LWfkQwrw@mail.gmail.com> <20190929000912.GI49516@bastion.zyxst.net>
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J., I think you are on the right track. The target machine is the btver1 cpu. But not all ports that run on the host Sandy Bridge machine will run on the SSD only btver1 cpu. You have your work cut out for you. Best of luck! Clay On Sat, Sep 28, 2019 at 7:09 PM tech-lists <tech-lists@zyxst.net> wrote: > Hi, > > On Sat, Sep 28, 2019 at 01:58:03PM -0500, Clay Daniels Jr. wrote: > >RE: " as btver1 and sandybridge are the same arch (amd64) just different > >cpus " > > > >I'm confused here: > >" *Sandy Bridge* is the codename for the microarchitecture used in the > >"second generation" of the Intel Core processors (Core i7, i5, i3) " > > > >" AMD Bobcat CPU (btver1)" > >" =E2=80=98btver1=E2=80=99 CPUs based on AMD Family 14h cores with x86-6= 4 instruction set > >support." > >" btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't > >support XSAVE." > > I'm getting this information from /usr/share/examples/etc/make.conf > > [..snip...] > > # The CPUTYPE variable controls which processor should be targeted for > # generated code. This controls processor-specific optimizations in > # certain code (currently only OpenSSL) as well as modifying the value > # of CFLAGS to contain the appropriate optimization directive to cc. > # The automatic setting of CFLAGS may be overridden using the > # NO_CPU_CFLAGS variable below. > # Currently the following CPU types are recognized: > # Intel x86 architecture: > # (AMD CPUs) amdfam10, opteron-sse3, athlon64-sse3, k8-sse3, > # opteron, athlon64, athlon-fx, k8, athlon-mp, > # athlon-xp, athlon-4, athlon-tbird, athlon, k7, > # geode, k6-3, k6-2, k6 > # (Intel CPUs) core2, core, nocona, pentium4m, pentium4, prescot= t, > # pentium3m, pentium3, pentium-m, pentium2, > # pentiumpro, pentium-mmx, pentium, i486 > # (VIA CPUs) c7, c3-2, c3 > # AMD64 architecture: amdfam10, opteron-sse3, athlon64-sse3, k8-sse3, > # opteron, athlon64, k8, core2, nocona > # SPARC-V9 architecture: v9 (generic 64-bit V9), ultrasparc (defau= lt > # if omitted), ultrasparc3 > # Additionally the following CPU types are recognized by clang: > # Intel x86 architecture (for both amd64 and i386): > # (AMD CPUs) znver1, bdver4, bdver3, bdver2, bdver1, btver2, > btver1 > # (Intel CPUs) tremont, goldmont-plus, icelake-server, > # icelake-client, > # cannonlake, knm, skylake-avx512, knl, goldmont, > # skylake, broadwell, haswell, ivybridge, > # sandybridge, westmere, nehalem, silvermont, bonne= ll > # > > [...snip...] > > The reason I want to use CPUTYPE?=3Dbtver1 is because that's the cpu in t= he > target machine, the machine in question has limited resources, and I want > to build ports tailored to those resources and abilities. As you can see > from the quoted text, both sandybridge and btver1 are recognised as > cputypes by clang. > > -- > J. >
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