From owner-freebsd-current  Mon Dec  3  2:58:27 2001
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From: Søren Schmidt <sos@freebsd.dk>
Message-Id: <200112031058.fB3AwDT04544@freebsd.dk>
Subject: Re: HEADSUP ATA support for newer SiS chipsets added
In-Reply-To: <3C0CA5A6.6050003@yahoo.com>
To: nuzrin@goose.net.my
Date: Mon, 3 Dec 2001 11:58:13 +0100 (CET)
Cc: Miklos Niedermayer <mico@bsd.hu>, Greg Lehey <grog@FreeBSD.ORG>,
	current@FreeBSD.ORG
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It seems nuzrin yaapar wrote:
> > Hmm, yes that looks somewhat on the low side...
> > Well, two things, the older VIA chips are not the best performers, but
> > I still think it should be better than that, I'll run some tests here,
> > I might have messed up something...
> > Are we talking -current or -stable here ?
> > 
> > -Søren
> > 
> dmesg:
> atapci0: <VIA 82C686 ATA100 controller> port 0xd000-0xd00f at device 7.1 
> on pci0
> ad0: 12416MB <QUANTUM FIREBALL CX13.0A> [25228/16/63] at ata0-master UDMA66
> 
> output:
> 1+0 records in
> 1+0 records out
> 524288 bytes transferred in 0.023098 secs (22698423 bytes/sec)

Hmm, I've just played around a bit, it seems we are hit by interrupt
latency or something, if you limit the transfer to 128k, which allows
the ATA controller to fetch it in one go, you will see the expected
transfer rates. Now I dont see this on PCI based controllers, and that
hints that the problem could be the fact that the two onboard controllers
sits on irq 14 & 15 making them the lowest priority devices in the system,
and that could cause the interrupt latency I'm seeing which then again
causes the bad transfer rates on transfers that need to transfer more
that one transaction full of data (ie max 128k).

-Søren

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