From nobody Tue Feb 10 15:43:30 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4f9Qnv5D5fz6RWp3 for ; Tue, 10 Feb 2026 15:43:31 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R13" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4f9Qnv0nLmz3LrJ for ; Tue, 10 Feb 2026 15:43:31 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770738211; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=VHBGG/+2QTaNCsK7T9nXsghPGnXZhd5lq2BZSf82LfE=; b=GLx5mcmSftvQ4E4NU2Qse5JIR298duhu67GwLSIv8IzHCacdMS0aDPuipHUtzKgZjFrHV+ R/k8adGAkT6P8N+b5/TfFA/rdbHwr9hAvl+p/hFWB9JhbdegThJlCcPyHXSPIDezeL+i3r mZ8MnO723OH7xC941bbK8WYqbGrNVT7NOhohG5hfmi31M6UG216yiq1aI6cOdjSqU9XUlw VDJvUh93rM1vOdIxbdjW3ur8Z3advad6SUSPSAmY++9aHvNWcLWb5MZsaODY/PnQUb/WAE YEhL55VS1+yrWh7W//VJ8taIsgny1Ao5SrPFoqclRWz+RApja6Ici+9e7zVY6Q== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1770738211; a=rsa-sha256; cv=none; b=V0JmUb7rWDJqi8dy952oLnKcK01z3TJ+BVlRdg0lg6rgyZpN4rUt8C5+GNEDdVAjqJkoyg nKZdJLbpSHEnMxMSm3Aftr2Ck8OW0Qy/s80e+uupoAAnVCoOkTjsmUv7rNd/NbAYU4rKgo 9X7wIdUQxFtZrSMwqaHZ/hyZe54Ptcuk13r3AKHvhTihSiAuujzP9waO7OOYoKIa0nqfyi enfLSCIzqdQ0jfeQ7UmasjHzwDMyyc0X2bPvg2a5PJp6cKgB2lrMSYX6ZY8o37LisKr5eA RLrVGVGlefxz92CT/rd4zSurdqOexsR/eCElfujcM7+RQIjReBZ6WhV7Dlsk0Q== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770738211; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=VHBGG/+2QTaNCsK7T9nXsghPGnXZhd5lq2BZSf82LfE=; b=sDyj0za7/fxipCACs1r34SnnD/PFsF0b2HeP00wKpNny86hDfxGG9ELrztQpUEEZg3XDDK LA3Zx0eH7toKOq2XBpZmG++BfWb+z5D++mYvDK/JaJHJsd2hqkCTqFXrrgah8rn4L36OSE Aewdwt61ippD8RdrVRykGYkzhXT0Pz4nR3Iwnt0z3ub36Ioi1JYs6MrErOHgibZV5P+4X9 BCOKsdMEvUZ5U1MXlj4Ano36WIrSsRzBtWaP4t/aMaOgNE+FEvK+syz/Dw1UMyLEY5V8g5 SIvr8eVjwDmlw1U3m94QTXBtnF8rRgF4kxgFIvGbaQeY41fGq1szdS6Ix3LAmg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4f9Qnv01Dlz1Ncg for ; Tue, 10 Feb 2026 15:43:31 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 47a13 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Tue, 10 Feb 2026 15:43:30 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Sarah Walker From: Andrew Turner Subject: git: 18af5a180b29 - main - arm64: Enable MOPS usage in the kernel List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 18af5a180b29f425b8427263be5517d3573ca220 Auto-Submitted: auto-generated Date: Tue, 10 Feb 2026 15:43:30 +0000 Message-Id: <698b5222.47a13.1abb34e1@gitrepo.freebsd.org> The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=18af5a180b29f425b8427263be5517d3573ca220 commit 18af5a180b29f425b8427263be5517d3573ca220 Author: Sarah Walker AuthorDate: 2026-02-09 20:39:53 +0000 Commit: Andrew Turner CommitDate: 2026-02-10 15:39:56 +0000 arm64: Enable MOPS usage in the kernel Support handling kernel-side MOE exceptions. Reported by: andrew Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D54943 --- sys/arm64/arm64/trap.c | 123 +++++++++++++++++++++++++------------------------ 1 file changed, 63 insertions(+), 60 deletions(-) diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c index 3de56187657c..b3c68fa4826f 100644 --- a/sys/arm64/arm64/trap.c +++ b/sys/arm64/arm64/trap.c @@ -480,6 +480,66 @@ fpe_trap(struct thread *td, void *addr, uint32_t exception) } #endif +static void +handle_moe(struct thread *td, struct trapframe *frame, uint64_t esr) +{ + uint64_t src; + uint64_t dest; + uint64_t size; + int src_reg; + int dest_reg; + int size_reg; + int format_option; + + format_option = esr & ISS_MOE_FORMAT_OPTION_MASK; + dest_reg = (esr & ISS_MOE_DESTREG_MASK) >> ISS_MOE_DESTREG_SHIFT; + size_reg = (esr & ISS_MOE_SIZEREG_MASK) >> ISS_MOE_SIZEREG_SHIFT; + dest = frame->tf_x[dest_reg]; + size = frame->tf_x[size_reg]; + + /* + * Put the registers back in the original format suitable for a + * prologue instruction, using the generic return routine from the + * Arm ARM (DDI 0487I.a) rules CNTMJ and MWFQH. + */ + if (esr & ISS_MOE_MEMINST) { + /* SET* instruction */ + if (format_option == ISS_MOE_FORMAT_OPTION_A || + format_option == ISS_MOE_FORMAT_OPTION_A2) { + /* Format is from Option A; forward set */ + frame->tf_x[dest_reg] = dest + size; + frame->tf_x[size_reg] = -size; + } + } else { + /* CPY* instruction */ + src_reg = (esr & ISS_MOE_SRCREG_MASK) >> ISS_MOE_SRCREG_SHIFT; + src = frame->tf_x[src_reg]; + + if (format_option == ISS_MOE_FORMAT_OPTION_B || + format_option == ISS_MOE_FORMAT_OPTION_B2) { + /* Format is from Option B */ + if (frame->tf_spsr & PSR_N) { + /* Backward copy */ + frame->tf_x[dest_reg] = dest - size; + frame->tf_x[src_reg] = src + size; + } + } else { + /* Format is from Option A */ + if (frame->tf_x[size_reg] & (1UL << 63)) { + /* Forward copy */ + frame->tf_x[dest_reg] = dest + size; + frame->tf_x[src_reg] = src + size; + frame->tf_x[size_reg] = -size; + } + } + } + + if (esr & ISS_MOE_FROM_EPILOGUE) + frame->tf_elr -= 8; + else + frame->tf_elr -= 4; +} + /* * See the comment above data_abort(). */ @@ -589,6 +649,9 @@ do_el1h_sync(struct thread *td, struct trapframe *frame) print_gp_register("far", far); panic("Branch Target exception"); break; + case EXCP_MOE: + handle_moe(td, frame, esr); + break; default: print_registers(frame); print_gp_register("far", far); @@ -597,66 +660,6 @@ do_el1h_sync(struct thread *td, struct trapframe *frame) } } -static void -handle_moe(struct thread *td, struct trapframe *frame, uint64_t esr) -{ - uint64_t src; - uint64_t dest; - uint64_t size; - int src_reg; - int dest_reg; - int size_reg; - int format_option; - - format_option = esr & ISS_MOE_FORMAT_OPTION_MASK; - dest_reg = (esr & ISS_MOE_DESTREG_MASK) >> ISS_MOE_DESTREG_SHIFT; - size_reg = (esr & ISS_MOE_SIZEREG_MASK) >> ISS_MOE_SIZEREG_SHIFT; - dest = frame->tf_x[dest_reg]; - size = frame->tf_x[size_reg]; - - /* - * Put the registers back in the original format suitable for a - * prologue instruction, using the generic return routine from the - * Arm ARM (DDI 0487I.a) rules CNTMJ and MWFQH. - */ - if (esr & ISS_MOE_MEMINST) { - /* SET* instruction */ - if (format_option == ISS_MOE_FORMAT_OPTION_A || - format_option == ISS_MOE_FORMAT_OPTION_A2) { - /* Format is from Option A; forward set */ - frame->tf_x[dest_reg] = dest + size; - frame->tf_x[size_reg] = -size; - } - } else { - /* CPY* instruction */ - src_reg = (esr & ISS_MOE_SRCREG_MASK) >> ISS_MOE_SRCREG_SHIFT; - src = frame->tf_x[src_reg]; - - if (format_option == ISS_MOE_FORMAT_OPTION_B || - format_option == ISS_MOE_FORMAT_OPTION_B2) { - /* Format is from Option B */ - if (frame->tf_spsr & PSR_N) { - /* Backward copy */ - frame->tf_x[dest_reg] = dest - size; - frame->tf_x[src_reg] = src + size; - } - } else { - /* Format is from Option A */ - if (frame->tf_x[size_reg] & (1UL << 63)) { - /* Forward copy */ - frame->tf_x[dest_reg] = dest + size; - frame->tf_x[src_reg] = src + size; - frame->tf_x[size_reg] = -size; - } - } - } - - if (esr & ISS_MOE_FROM_EPILOGUE) - frame->tf_elr -= 8; - else - frame->tf_elr -= 4; -} - void do_el0_sync(struct thread *td, struct trapframe *frame) {