From owner-svn-src-head@FreeBSD.ORG Sun Apr 13 22:35:39 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id D028C22D; Sun, 13 Apr 2014 22:35:39 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BC9CD1CC9; Sun, 13 Apr 2014 22:35:39 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s3DMZdFh077940; Sun, 13 Apr 2014 22:35:39 GMT (envelope-from rpaulo@svn.freebsd.org) Received: (from rpaulo@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s3DMZdbZ077938; Sun, 13 Apr 2014 22:35:39 GMT (envelope-from rpaulo@svn.freebsd.org) Message-Id: <201404132235.s3DMZdbZ077938@svn.freebsd.org> From: Rui Paulo Date: Sun, 13 Apr 2014 22:35:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r264428 - head/sys/boot/fdt/dts/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 13 Apr 2014 22:35:40 -0000 Author: rpaulo Date: Sun Apr 13 22:35:39 2014 New Revision: 264428 URL: http://svnweb.freebsd.org/changeset/base/264428 Log: Improve the i.MX53 / Digi DTS: * Fix the IPU address. * Fix the PATA definition. * Add another I2C. * Add more UARTs. * Add SATA. Modified: head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts head/sys/boot/fdt/dts/arm/imx53x.dtsi Modified: head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts ============================================================================== --- head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts Sun Apr 13 22:32:46 2014 (r264427) +++ head/sys/boot/fdt/dts/arm/digi-ccwmx53.dts Sun Apr 13 22:35:39 2014 (r264428) @@ -45,7 +45,10 @@ 0xB0000000 0x10000000>; }; - localbus@18000000 { + localbus@10000000 { + sata@10000000 { + status = "okay"; + }; ipu3@1E000000 { status = "okay"; }; @@ -69,13 +72,19 @@ timer@53fa0000 { status = "okay"; }; - /* UART1, console */ console: serial@53fbc000 { status = "okay"; clock-frequency = <0>; /* won't load w/o this */ }; - + serial@53fc0000 { + status = "okay"; + clock-frequency = <0>; /* won't load w/o this */ + }; + serial@53ff0000 { + status = "okay"; + clock-frequency = <0>; /* won't load w/o this */ + }; clock@53fd4000 { status = "okay"; }; @@ -100,6 +109,14 @@ wdog@53f98000 { status = "okay"; }; + i2c@53fec000 { + status = "okay"; + rtc@68 { + compatible = "dialog,ds9052"; + reg = <0x48>; + interrupts = <0x1 0x1 0 0>; + }; + }; }; aips@60000000 { ethernet@63fec000 { @@ -118,6 +135,9 @@ ide@63fe0000 { status = "okay"; }; + serial@63f90000 { + status = "okay"; + }; }; }; Modified: head/sys/boot/fdt/dts/arm/imx53x.dtsi ============================================================================== --- head/sys/boot/fdt/dts/arm/imx53x.dtsi Sun Apr 13 22:32:46 2014 (r264427) +++ head/sys/boot/fdt/dts/arm/imx53x.dtsi Sun Apr 13 22:35:39 2014 (r264428) @@ -282,7 +282,13 @@ /* 50028000 0x4000 SPDIF */ /* 91 SPDIF */ - /* 50030000 0x4000 PATA (PORT UDMA) irq70 */ + pata@50030000 { + compatible = "fsl,imx53-ata"; + reg = <0x50030000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <70>; + status = "disabled"; + }; /* 50034000 0x4000 SLM */ /* 50038000 0x4000 HSI2C */ @@ -444,7 +450,7 @@ status = "disabled"; }; - /* 53FC0000 0x4000 UART 4 */ + /* 53FF0000 0x4000 UART 4 */ uart4: serial@53ff0000 { compatible = "fsl,imx53-uart", "fsl,imx-uart"; reg = <0x53ff0000 0x4000>; @@ -469,17 +475,16 @@ interrupts = <73 74>; status = "disabled"; }; - - /* 53FE8000 0x4000 PATA (PORT PIO) */ - /* 70 PATA Parallel ATA host controller interrupt */ - ide@53fe8000 { - compatible = "fsl,imx53-ata"; - reg = <0x83fe0000 0x4000>; + i2c@53fec000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c", + "fsl,imx-i2c"; + reg = <0x53fec000 0x4000>; interrupt-parent = <&tzic>; - interrupts = <70>; + interrupts = <64>; status = "disabled"; }; - }; aips@60000000 { /* AIPS2 */ @@ -489,7 +494,7 @@ interrupt-parent = <&tzic>; ranges; - /* 53FC0000 0x4000 UART 5 */ + /* 63F90000 0x4000 UART 5 */ uart5: serial@63f90000 { compatible = "fsl,imx53-uart", "fsl,imx-uart"; reg = <0x63f90000 0x4000>; @@ -650,13 +655,20 @@ }; }; - localbus@18000000 { + localbus@10000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges; + sata@10000000 { + compatible = "fsl,imx53-ata"; + reg = <0x10000000 0x4000>; + interrupt-parent = <&tzic>; + interrupts = <28>; + status = "disabled"; + }; + vga: ipu3@1E000000 { compatible = "fsl,ipu3"; reg = <