From owner-svn-src-head@FreeBSD.ORG Fri Nov 30 20:15:02 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 80CF6A08; Fri, 30 Nov 2012 20:15:02 +0000 (UTC) (envelope-from jkim@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 66ECC8FC13; Fri, 30 Nov 2012 20:15:02 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.5/8.14.5) with ESMTP id qAUKF2NP049360; Fri, 30 Nov 2012 20:15:02 GMT (envelope-from jkim@svn.freebsd.org) Received: (from jkim@localhost) by svn.freebsd.org (8.14.5/8.14.5/Submit) id qAUKF2BA049358; Fri, 30 Nov 2012 20:15:02 GMT (envelope-from jkim@svn.freebsd.org) Message-Id: <201211302015.qAUKF2BA049358@svn.freebsd.org> From: Jung-uk Kim Date: Fri, 30 Nov 2012 20:15:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r243712 - in head/sys: amd64/pci i386/pci X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Nov 2012 20:15:02 -0000 Author: jkim Date: Fri Nov 30 20:15:01 2012 New Revision: 243712 URL: http://svnweb.freebsd.org/changeset/base/243712 Log: Use volatile keywords properly. Modified: head/sys/amd64/pci/pci_cfgreg.c head/sys/i386/pci/pci_cfgreg.c Modified: head/sys/amd64/pci/pci_cfgreg.c ============================================================================== --- head/sys/amd64/pci/pci_cfgreg.c Fri Nov 30 19:36:55 2012 (r243711) +++ head/sys/amd64/pci/pci_cfgreg.c Fri Nov 30 20:15:01 2012 (r243712) @@ -313,7 +313,7 @@ static int pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg, unsigned bytes) { - volatile vm_offset_t va; + vm_offset_t va; int data = -1; if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || @@ -324,16 +324,16 @@ pciereg_cfgread(int bus, unsigned slot, switch (bytes) { case 4: - __asm __volatile("movl %1, %0" : "=a" (data) - : "m" (*(uint32_t *)va)); + __asm("movl %1, %0" : "=a" (data) + : "m" (*(volatile uint32_t *)va)); break; case 2: - __asm __volatile("movzwl %1, %0" : "=a" (data) - : "m" (*(uint16_t *)va)); + __asm("movzwl %1, %0" : "=a" (data) + : "m" (*(volatile uint16_t *)va)); break; case 1: - __asm __volatile("movzbl %1, %0" : "=a" (data) - : "m" (*(uint8_t *)va)); + __asm("movzbl %1, %0" : "=a" (data) + : "m" (*(volatile uint8_t *)va)); break; } @@ -344,7 +344,7 @@ static void pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data, unsigned bytes) { - volatile vm_offset_t va; + vm_offset_t va; if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || func > PCI_FUNCMAX || reg > PCIE_REGMAX) @@ -354,15 +354,15 @@ pciereg_cfgwrite(int bus, unsigned slot, switch (bytes) { case 4: - __asm __volatile("movl %1, %0" : "=m" (*(uint32_t *)va) + __asm("movl %1, %0" : "=m" (*(volatile uint32_t *)va) : "a" (data)); break; case 2: - __asm __volatile("movw %1, %0" : "=m" (*(uint16_t *)va) + __asm("movw %1, %0" : "=m" (*(volatile uint16_t *)va) : "a" ((uint16_t)data)); break; case 1: - __asm __volatile("movb %1, %0" : "=m" (*(uint8_t *)va) + __asm("movb %1, %0" : "=m" (*(volatile uint8_t *)va) : "a" ((uint8_t)data)); break; } Modified: head/sys/i386/pci/pci_cfgreg.c ============================================================================== --- head/sys/i386/pci/pci_cfgreg.c Fri Nov 30 19:36:55 2012 (r243711) +++ head/sys/i386/pci/pci_cfgreg.c Fri Nov 30 20:15:01 2012 (r243712) @@ -665,7 +665,7 @@ pciereg_cfgread(int bus, unsigned slot, unsigned bytes) { struct pcie_cfg_elem *elem; - volatile vm_offset_t va; + vm_offset_t va; vm_paddr_t pa, papage; int data = -1; @@ -681,16 +681,16 @@ pciereg_cfgread(int bus, unsigned slot, switch (bytes) { case 4: - __asm __volatile("movl %1, %0" : "=a" (data) - : "m" (*(uint32_t *)va)); + __asm("movl %1, %0" : "=a" (data) + : "m" (*(volatile uint32_t *)va)); break; case 2: - __asm __volatile("movzwl %1, %0" : "=a" (data) - : "m" (*(uint16_t *)va)); + __asm("movzwl %1, %0" : "=a" (data) + : "m" (*(volatile uint16_t *)va)); break; case 1: - __asm __volatile("movzbl %1, %0" : "=a" (data) - : "m" (*(uint8_t *)va)); + __asm("movzbl %1, %0" : "=a" (data) + : "m" (*(volatile uint8_t *)va)); break; } @@ -703,7 +703,7 @@ pciereg_cfgwrite(int bus, unsigned slot, unsigned bytes) { struct pcie_cfg_elem *elem; - volatile vm_offset_t va; + vm_offset_t va; vm_paddr_t pa, papage; if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || @@ -718,15 +718,15 @@ pciereg_cfgwrite(int bus, unsigned slot, switch (bytes) { case 4: - __asm __volatile("movl %1, %0" : "=m" (*(uint32_t *)va) + __asm("movl %1, %0" : "=m" (*(volatile uint32_t *)va) : "a" (data)); break; case 2: - __asm __volatile("movw %1, %0" : "=m" (*(uint16_t *)va) + __asm("movw %1, %0" : "=m" (*(volatile uint16_t *)va) : "a" ((uint16_t)data)); break; case 1: - __asm __volatile("movb %1, %0" : "=m" (*(uint8_t *)va) + __asm("movb %1, %0" : "=m" (*(volatile uint8_t *)va) : "a" ((uint8_t)data)); break; }