Date: Thu, 1 Oct 2020 19:56:51 +0200 From: =?UTF-8?Q?Olivier_Cochard=2DLabb=C3=A9?= <olivier@freebsd.org> To: Hans Petter Selasky <hps@selasky.org> Cc: =?UTF-8?Q?Michal_Van=C4=8Do?= <michal@microwave.sk>, freebsd-net@freebsd.org Subject: Re: mlx5 irq Message-ID: <CA%2Bq%2BTcpVvNSGuxrFLTPT2_D-7_tban=7UvDg6VjGCb6eX_Zi4A@mail.gmail.com> In-Reply-To: <32dbe3be-4b0a-6a94-d368-c5943d688bc6@selasky.org> References: <0aa09fcc-dfcc-005e-8834-2a758ba6a03f@microwave.sk> <94978a05-94c6-cc55-229c-5a3c5352b29a@selasky.org> <c9f8bd7f-6d9d-bb6e-307c-a19c9730b564@microwave.sk> <c2fc9301-f085-189f-ca3a-42d1f97fd870@selasky.org> <3c64095f-8a45-0fb4-4835-7486bbd84663@microwave.sk> <32dbe3be-4b0a-6a94-d368-c5943d688bc6@selasky.org>
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On Thu, Oct 1, 2020 at 12:28 PM Hans Petter Selasky <hps@selasky.org> wrote= : > On 2020-10-01 11:13, Michal Van=C4=8Do via freebsd-net wrote: > > On 01/10/2020 10:52, Hans Petter Selasky wrote: > >> On 2020-10-01 10:24, Michal Van=C4=8Do wrote: > >>> But why is the actual number of IRQ lines bigger than number of CPU > >>> cores? > >> > >> There are some dedicated IRQ's used for firmware management. > >> > >> Else the driver will use the number of online CPU's by default as the > >> number of rings, if the hardware supports it. > > > > Thanks for clarification. Is there any way to optimize this? In my case > > I have 2 CPU sockets with 8 cores each (SMT is disabled). NIC is > > connected via PCIe to the first CPU socket (numa domain 0). In this > > case, wouldn't it be better if all interrupts were firing only on cores > > of first socket? > > > > Hi, > > You can use "cpuset" to bind those IRQ threads to the right core. > > > You could try this RC script to bind them: https://github.com/ocochard/BSDRP/blob/master/BSDRP/Files/usr/local/etc/rc.= d/mlx5en_affinity Regards, Olivier
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