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Date:      Wed, 14 Aug 2013 14:55:12 -0700
From:      hiren panchasara <hiren.panchasara@gmail.com>
To:        Davide Italiano <davide@freebsd.org>
Cc:        Jim Harris <jimharris@freebsd.org>, Adrian Chadd <adrian@freebsd.org>, freebsd-current <freebsd-current@freebsd.org>
Subject:   Re: patch: enable MEM_LOAD_UOPS_LLC_HIT_RETIRED on sandy bridge xeon
Message-ID:  <CALCpEUGK_rU5Jo_Wa4p%2Bb2BrZq=S2vTCsBHHR_pUoFJ6z90wpw@mail.gmail.com>
In-Reply-To: <CACYV=-FJsp-1TzG=p8DoNziBDSG50g3_tpsRgHwV8wW=NSpFGQ@mail.gmail.com>
References:  <CAJ-VmokvupmjqwPdDy%2B1Z0fe3ZJK5b=mKgQM_4m9%2BCQG7mm_6g@mail.gmail.com> <CACYV=-FJsp-1TzG=p8DoNziBDSG50g3_tpsRgHwV8wW=NSpFGQ@mail.gmail.com>

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2013/8/14 Davide Italiano <davide@freebsd.org>:
> On Wed, Aug 14, 2013 at 10:58 PM, Adrian Chadd <adrian@freebsd.org> wrote:
>> Hi,
>>
>> This (and maybe more?) events are applicable to both the sandy bridge and
>> sandy bridge xeon CPUs.
>>
>> This is from the Intel SDM June 2013 Volume #3.
>>
>> David/Jim, does this look fine to you?
>>
>> Thanks,
>>
>>
>> ndex: sys/dev/hwpmc/hwpmc_core.c
>> ===================================================================
>> --- sys/dev/hwpmc/hwpmc_core.c  (revision 254263)
>> +++ sys/dev/hwpmc/hwpmc_core.c  (working copy)
>> @@ -1541,13 +1541,18 @@
>>         IAP_F_SBX | IAP_F_IBX | IAP_F_HW),
>>
>>      IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
>> -       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW),
>> +       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_IB |
>> +       IAP_F_IBX | IAP_F_HW),
>>      IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
>> -       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW),
>> +       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IIAP_F_IB |
>> +       IAP_F_IBX | IAP_F_HW),
>>      IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
>> -       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW),
>> +       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IIAP_F_IB |
>> +       IAP_F_IBX | IAP_F_HW),
>>      IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
>> -       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW),
>> +       IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IIAP_F_IB |
>> +       IAP_F_IBX | IAP_F_HW),
>> +
>>      IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 |
>>         IAP_F_I7 | IAP_F_WM),
>>      IAPDESCR(D2H_10H, 0xD2, 0x10, IAP_F_FM | IAP_F_CC2E),
>>
>
> Yes, this looks good for me, but it's incomplete.
> You need at least to put the event alias for both Sandy Bridge and
> Sandy Bridge Xeon in sys/dev/hwpmc/pmc_events.h
> Also, you tested the aforementioned events one by one to see if the
> pmc is allocated etc...?
You can use $src/tools/test/hwpmc/pmctest.py to do basic sanity test
of all the available counters.

cheers,
Hiren
>
> Thanks,
>
> --
> Davide
>
> "There are no solved problems; there are only problems that are more
> or less solved" -- Henri Poincare
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