Date: Wed, 16 Dec 2015 14:49:04 +0100 From: Willem Jan Withagen <wjw@digiware.nl> To: Stanislav Galabov <sgalabov@gmail.com>, Adrian Chadd <adrian@freebsd.org> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: Initial support for MT7620 Message-ID: <56716BD0.1080801@digiware.nl> In-Reply-To: <17D0A04B-7164-48AE-9909-107EEBDF72E5@gmail.com> References: <1479DFB0-6B63-4886-B9BA-8F95A44A8ED9@gmail.com> <CAJ-Vmo=ryMSC6AsQwayi1P-%2Bvw8S9ow8%2BSPi%2BsuLWgTX=v4wPw@mail.gmail.com> <17D0A04B-7164-48AE-9909-107EEBDF72E5@gmail.com>
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On 15-12-2015 17:16, Stanislav Galabov wrote:
> WiTi board looks nice, I’d go for it.
>
> I have by no means given up on MT7621 support and rolling it in together with RT305x would probably be best if we manage to do it.
> I’d actually like to continue after MT7620 and MT7621 and include support for MT7628 and MT7688 as well :-)
Finally got the time to dig out the board and the serial connector.
This is what my WitiBoard spews at me while booting in Uboot.....
So now I'm off to finding a suitable system here to put tftp on
and go from there.
--WjW
===================================================================
MT7621 stage1 code 10:33:55 (ASIC)
CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x31100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-800Mhz ===
PLL3 FB_DL: 0x0, 1/0 = 1024/0 01000000
PLL4 FB_DL: 0x16, 1/0 = 693/331 59000000
PLL2 FB_DL: 0x19, 1/0 = 581/443 65000000
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96
104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 1
000F:| 0 0 0 0 0 0 0 1 1 1 1 1 1
1 1 1
0010:| 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0
0011:| 1 1 1 1 1 1 0 0 0 0 0 0 0
0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
rank 0 coarse = 16
rank 0 fine = 56
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0
0 0 0
opt_dle value:9
DRAMC_R0DELDLY[018]=00002C2D
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 13 10 11 11 11 9 11 7 7 9
10 | 10 11 8 10 8 11
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =45 DQS1 = 44
==================================================================
bit DQS0 bit DQS1
0 (2~86)44 8 (1~86)43
1 (1~86)43 9 (2~86)44
2 (1~87)44 10 (1~87)44
3 (1~88)44 11 (2~85)43
4 (1~89)45 12 (1~86)43
5 (1~87)44 13 (1~84)42
6 (1~87)44 14 (1~86)43
7 (1~87)44 15 (2~87)44
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 14 12 12 12 11 10 12 8 8 9
10 | 10 12 9 12 9 11
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
20,data:88
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=500000000 HZ BUS=166666666 HZ
===================================================================
U-Boot 1.1.3 (May 17 2015 - 18:53:31)
Board: Ralink APSoC DRAM: 256 MB
relocate_code Pointer at: 8ffb8000
Config XHCI 40M PLL
flash manufacture id: c8, device id 40 18
find flash: GD25Q128C
*** Warning - bad CRC, using default environment
============================================
Ralink UBoot Version: 4.3.0.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:May 17 2015 Time:18:53:31
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =256 Mbytes
#Reset_MT7530
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
2
You choosed 1
0
1: System Load Linux to SDRAM via TFTP.
Please Input new ones /or Ctrl-C to discard
Input device IP (10.10.10.123) ==:10.10.10.123
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