Date: Wed, 8 Jan 1997 12:44:32 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: SimsS@IBM.Net Cc: terry@lambert.org, Hackers@FreeBSD.ORG Subject: Re: Bounce Buffers and CCD Message-ID: <199701081944.MAA16809@phaeton.artisoft.com> In-Reply-To: <199701081828.SAA207537@smtp-gw01.ny.us.ibm.net> from "Steve Sims" at Jan 8, 97 01:27:23 pm
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> >> (Terry, I hope I haven't quoted you out of context, but I'm here to tell > >> ya': BOUNCE-BUFFERS is a MANDATORY option for >16M systems, at least on > >> 3.0-CURRENT with my mo-bo having PCI, ISA and VESA!) > > > > Then it's not required AND it's broken. 8-(. > > > > Bounce conditions are supposed to be autodetected. > > Would that it were true.... > > > What controller are you using? (PCI/VESA/ISA?) > > Plain-vanilla ISA flavor Adaptec 1542-CF, Firmware 2.02 (IIRC), defaults all > around: 0x330, IRQ:11 DRQ:5 Bounce buffers should be implied by the 1542 driver, automagically. If they are not, then the driver is broken; I would guess "recently". > > How many address lines are propagated, if PCI/VESA? (24/32?) > > Beats me. How can I find out? (Not that I'm sure it matters, being an > ISA-centric failure. It's not PCI/VESA, so it's 24 (standard for ISA). Means the DMA target has to be in the low 16M, and if it isn't it needs to be "bounced". This is determined by knowing that it's an AHA1542 driver (ISA DMA bus master) and comparing the address to see if it's above 16M. > > If you are using an ISA bus mastering DMA controller, it's supposed > > to be handled. If you are using nything else, it's supposed to be > > unnecessary; if you find it necessary for non-ISA hardware, your > > motherboard is not standards compliant and you should contact the > > manufacturer (and send mail with make/model/revision to the hardware > > list maintainers for a "don't anyone else buy one of these" note). > > "Supposed" being the operative term here... ;-) "Is handled as far as I know for non-broken hardware that meets the bus specifications as ratified as accepted standards". In other words, making NiCE HiNT chipset machines work is out of scope (but possible -- see previous postings for this subject). Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
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