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Date:      Sat, 18 Jan 1997 12:57:46 -0700 (MST)
From:      Terry Lambert <terry@lambert.org>
To:        ken@housing1.stucen.gatech.edu (Kenneth Merry)
Cc:        cbrown@aracnet.com, smp@freebsd.org
Subject:   Re: Adaptec 3940UW and SMP
Message-ID:  <199701181957.MAA12287@phaeton.artisoft.com>
In-Reply-To: <199701180459.XAA06284@housing1.stucen.gatech.edu> from "Kenneth Merry" at Jan 17, 97 11:59:41 pm

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> > Why not place the 3940UW in slot 4.  That way, it will share an
> > interrupt with the other channel of the 3940UW.
> 
> 	Hmm, yeah, that might well work.  It's working fine as-is, though.
> I'll probably get around to testing things with at least 4 slots full
> before too long, though.

The PCI channels are not allocated that way.  They are allocated
this way:

      ,-.        ,-.        ,-.        ,-.        ,-.
A ----| |-.    ,-| |-.    ,-| |-.    ,-| |--------| |
      |s|  \  /  |s|  \  /  |s|  \  /  |s|        |s|
B ----|l|-. `/---|l|-. `/---|l|-. `/---|l|--------|l|
      |o|  \/    |o|  \/    |o|  \/    |o|        |o|
C ----|t|-./`----|t|-./`----|t|-./`----|t|--------|t|
      |1| /\     |2| /\     |3| /\     |4|        |5|
D ----| |-  `----| |-  `----| |-  `----| |--------| |
      `-'        `-'        `-'        `-'        `-'

This is called "daisy-chaining".

A PCI card using one interrupt always takes connector 'A', unless
some idiot board designer out-clevers himself.

A PCI card using two interrupts always takes connectors 'A' and
connector 'B'.

A 3940 in slot 1 will take A+B, slot 2 will take D+A, slot 3
will take C+D, and slot 4 (or slot 5) will take B+C.

Technically, the thing does *NOT* steal the interrupt "belonging"
to the next slot.

Many (older) PCI cards will allow you to jumper the board (or use
NVRAM settings) so that the card will take connector 'A', 'B', 'C',
or 'D'.

Many stupid motherboard designs (especially older boards from the
Intel OEM products division) didn't daisy-chain.  Without the
daisy-chaining, cards inserted in any slot would always allocate
'A'.  This is stupid because shared interrupts are stupid: if you
have multiple devices on the same interrupt, then you must query
each device using the interrupt to ask it "did you generate this
interrupt?".  In addition, you must service the interrupts for
the sharing devices *consecutively*, instead of *concurrently*.
For an SMP system this is wasteful, since it means you can't
service one of two concurrent interrupts on a share line on
different processors.

A PCI chipset design is not required to daisy-chain.  In fact, the
Apple and Motorolla bridge chipsets assign a seperate hardware
interrupt per INT line per slot; because there are seperate line
drivers for these things, they can also support a lot more slots
without bridging things.  The Intel design has to daisy-chain
because it is a lazy design; it has the 4 slot limit because of
the line drivers having to drive 4 slots per driver instead of 1.

To give Intel credit: they were working from the perspective
that they had an ISA machine which they were bridging PCI slots
into the design.  This is a stupid perspective, since all machines
should be PCI, and ISA should DIE DIE DIE, or at the very least,
the ISA stuff should be bridged to the PCI in a predominantly
PCI design.  This would let you remap an internally share ISA
interrupts on the rational (PCI) side of the bridge.

#ifdef EDITORIAL
Hmmm... the Alpha 21064/21066 works this way; so do all the
Motorolla PPC chips... looks like Intel's the only one married to
ISA-dictated designs.  Pity... ISA-dictated designs are only 15
years out of date.
#endif	/* EDITORIAL*/


PCI-PCI bridges compliant with the 1.0 PCI-PCI bridge specification
(April, 1994) will internally daisy-chain interrupts to allow card
cage fanouts using a passive PCI backplane to be built (ie: insert
a card into the main machine, and you get 4 more PCI slots; or you
can build a machine with a PCI-PCI bridge integrated on it, and
offer 7 (or 8) PSI slots on a single motherboard.

Lessons:

1)	Putting a card using two interrupts into slot 4 of a 5
	PCI "shared slot" design will not cause the card to
	use the same interrupt for both channels of the internally
	bridged device.

2)	INT A-D are not interrupts, they are mappings to interrupts
	by a bridge chipset.

3)	Intel PCI bridge chipsets: Bad.  Apple/Motorolla PCI bridge
	chipsets: Good.

4)	Intel OEM products divisions motherboards (at least the old
	ones): Bad.  ASUS motherboards: Good.

5)	ISA slots: Bad.  PCI slots: Good.

6)	PCI cards that allow you to jumper which INT A-D is assigned
	to which channel: Good.  Adaptec 3940's: Unknown.

7)	Sharing Interrupts: Allowed, Required to be supported, but Bad.
	One interrupt per device: Not always possible, but Good.


					Regards,
					Terry Lambert
					terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.



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