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Date:      Sun, 19 Apr 1998 22:59:30 +0200
From:      Tor Egge <Tor.Egge@idi.ntnu.no>
To:        gibbs@plutotech.com
Cc:        andreas@klemm.gtn.com, smp@FreeBSD.ORG
Subject:   Re: SMP Problems 
Message-ID:  <199804192059.WAA11325@pat.idi.ntnu.no>
In-Reply-To: Your message of "Sun, 19 Apr 1998 12:12:27 -0600"
References:  <199804191816.MAA06451@pluto.plutotech.com>

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> >It might be reasonable to ignore the polarity/trigger-mode values in
> >the MP table if the APIC interrupt pin number corresponds to the
> >ISA/EISA interrupt number, since ISA/EISA interrupts are active-high
> >edge triggered interrupts when reaching the IOAPIC.

> 
> The EISA spec allows level sensitive interrupts.  Is this not the case for
> SMP systems?  Seems strange.

A comments in mpapic.c says:

		/*
		 * EISA IRQ's are identical to ISA irq's, regardless of
		 * whether they are edge or level since they go through
		 * the level/polarity converter gadget.
		 */

This indicates that the ELCR registers (at I/O addresses 0x4d0 and
0x4d1) are relevant also in Symmetric I/O mode.

The MP spec also indicates that the ELCR registers are relevant in
Symmetric I/O mode, but instead of selecting between edge-triggered
active-high and level-triggered active-low, the ELCR register only
controls whether the interrupt signal should be inverted or not before
being delivered to the PIC and IOAPIC.  The polarity of any redirected
PCI interrupts are not affected by the ELCR register, according to
figure 5-2.

Table 4.10 indicates that a `conforming' EISA level interrupt is
active-low as delivered to the IOAPIC.  Section 5.3.2 and figure 5-2
disagrees.

Thus there are three different interpretations of how to handle an
EISA level interrupt registered in the MP table as conforming with
regard to polarity:

	- Believe the comment in mpapic.c, and handle as 
	  active-high edge interrupt.

	- Believe table 4.10 in the MP spec, and handle as 
	  active-low level interrupt.

	- Believe figure 5-2 and section 5.3.2 in the MP spec and
	  handle as active-high level interrupt.

- Tor Egge


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