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Date:      Mon, 28 Jun 1999 00:36:39 -0500
From:      Alan Cox <alc@cs.rice.edu>
To:        Terry Lambert <tlambert@primenet.com>
Cc:        Bakul Shah <bakul@torrentnet.com>, julian@whistle.com, dillon@apollo.backplane.com, freebsd-smp@freebsd.org
Subject:   Re: high-efficiency SMP locks - submission for review
Message-ID:  <19990628003639.N2738@cs.rice.edu>
In-Reply-To: <199906280521.WAA27383@usr04.primenet.com>; from Terry Lambert on Mon, Jun 28, 1999 at 05:21:05AM %2B0000
References:  <199906272253.SAA04385@chai.torrentnet.com> <199906280521.WAA27383@usr04.primenet.com>

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On Mon, Jun 28, 1999 at 05:21:05AM +0000, Terry Lambert wrote:
> 
> I also have a slight problem with relying on a test-and-set
> instruction any more complicated than that which can be
> implemented with P/V semaphores.  Many processors (e.g. MIPS)
> don't have an atomic test and set, and you'd want to avoid
> architecting against them ever working.  8-(.
> 

That is true.  They, including MIPS and Alpha, have something
better:  Load-locked and store conditional.  :-)

I think this is a non-issue.

Alan



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