Date: Mon, 3 Dec 2001 22:33:42 -0800 (PST) From: Matthew Dillon <dillon@apollo.backplane.com> To: Søren Schmidt <sos@freebsd.dk> Cc: nuzrin@goose.net.my, Miklos Niedermayer <mico@bsd.hu>, Greg Lehey <grog@FreeBSD.ORG>, current@FreeBSD.ORG Subject: Re: HEADSUP ATA support for newer SiS chipsets added Message-ID: <200112040633.fB46XgI16876@apollo.backplane.com> References: <200112040619.fB46Jd786535@freebsd.dk>
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:> :sits on irq 14 & 15 making them the lowest priority devices in the system, :> :and that could cause the interrupt latency I'm seeing which then again :> :causes the bad transfer rates on transfers that need to transfer more :> :that one transaction full of data (ie max 128k). :> : :> :-Søren :> :> The larger transfers are probably choking the IDE drive's pipelining :> capabilities. That's my guess, anyway. I avoid IDE like the plague. : :No, not true, if the same drive is put on a PCI based ATA controller :you get the expected transfer speed upto the drives cache size. : :-Søren Ahhh. Hmm. That is very odd then. Even at irq 14/15 the interrupt priority should not make a difference, at least not in a simple test when the machine isn't doing anything else. -Matt Matthew Dillon <dillon@backplane.com> To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message
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